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https://github.com/zephyrproject-rtos/zephyr
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This is just a stub with bits of information about RISC-V support on Zephyr, that can and should be improved over time. Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
14 lines
185 B
ReStructuredText
14 lines
185 B
ReStructuredText
.. _arch:
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Architecture-related Guides
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###########################
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.. toctree::
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:maxdepth: 1
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arc-support-status.rst
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arm_cortex_m.rst
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risc-v.rst
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semihost.rst
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x86.rst
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