Andrew Boie 377f616b3c arc: fix alignment of IRQ vector table ... On ARC the IRQ and exception vectors are just one big array of function pointers placed at the very beginning of the binary in ROM. Vectors 0-15 are for CPU exceptions, 16-255 for interrupts. In Zephyr these have been logically split into an execption table followed immediately by the IRQ table, specified in the ARC linker.cmd. However, the exception vector table defined in Zephyr had only 14 entries so the IRQ table was misaligned by 8 bytes. This went undetected for some time as in the default configuration every entry in the IRQ table pointed to the common demux function _isr_enter(). This patch correctly ensures that the IRQ table begins at address 0x40000040 instead of 0x40000038 like it had been. Change-Id: I3b548df0dcabeb9d986ecd6a41e593bd02e3bd73 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>		2016-02-05 20:25:13 -05:00
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arc	arc: fix alignment of IRQ vector table	2016-02-05 20:25:13 -05:00
arm	arc: arm: don't use recursion to create _sw_isr_table	2016-02-05 20:25:13 -05:00
x86	x86/quark_se: Add default config options for PWM	2016-02-05 20:25:11 -05:00
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