zephyr/arch
Johan Hedberg 38333afe0e arch: x86: zefi: Reduce data section alignment requirement from 8 to 4
It's not safe to assume that the data section is 8-byte aligned.
Assuming 4-byte alignment seems to work however, and results in
simpler code than arbitrary alignment support.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2020-07-18 08:44:31 -04:00
..
arc include: Implement API's for cache flush and cache invalidate 2020-07-15 15:53:26 -07:00
arm arch: add CONFIG_CPU_HAS_MMU 2020-07-17 11:38:18 +02:00
common
nios2
posix
riscv
x86 arch: x86: zefi: Reduce data section alignment requirement from 8 to 4 2020-07-18 08:44:31 -04:00
xtensa
CMakeLists.txt
Kconfig arch: add CONFIG_MMU 2020-07-17 11:38:18 +02:00