Daniel Leung 388725870f arm: cortex_m: add support for thread local storage ... Adds the necessary bits to initialize TLS in the stack area and sets up CPU registers during context switch. Note that since Cortex-M does not have the thread ID or process ID register needed to store TLS pointer at runtime for toolchain to access thread data, a global variable is used instead. Signed-off-by: Daniel Leung <daniel.leung@intel.com>		2020-10-24 10:52:00 -07:00
..
arc	ARC: MWDT: drop redundant stack checking	2020-10-02 11:32:12 +02:00
arm	arm: cortex_m: add support for thread local storage	2020-10-24 10:52:00 -07:00
common	ARCH: COMMON: split sys_io.h for MMIO & memory bits functions	2020-09-01 13:36:48 +02:00
nios2	arch: Apply dynamic IRQ API change	2020-09-02 13:48:13 +02:00
posix	Revert "posix: linker: Wrap rodata and rwdata in sections."	2020-09-02 14:46:01 -04:00
riscv	arch: Apply dynamic IRQ API change	2020-09-02 13:48:13 +02:00
x86	x86: add support for thread local storage	2020-10-24 10:52:00 -07:00
xtensa	arch/xtensa: soc/xtensa/intel_adsp: Enable KERNEL_COHERENCE	2020-10-21 06:38:53 -04:00
arch_inlines.h
cpu.h
syscall.h