Daniel Leung 388725870f arm: cortex_m: add support for thread local storage ... Adds the necessary bits to initialize TLS in the stack area and sets up CPU registers during context switch. Note that since Cortex-M does not have the thread ID or process ID register needed to store TLS pointer at runtime for toolchain to access thread data, a global variable is used instead. Signed-off-by: Daniel Leung <daniel.leung@intel.com>		2020-10-24 10:52:00 -07:00
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include	kernel: add common bits to support TLS	2020-10-24 10:52:00 -07:00
atomic_c.c
cache_handlers.c
CMakeLists.txt
compiler_stack_protect.c
device.c
errno.c
fatal.c	kernel: fatal: check if _current is NULL	2020-10-24 12:54:32 -04:00
futex.c
idle.c
init.c
Kconfig	arm: cortex_m: add support for thread local storage	2020-10-24 10:52:00 -07:00
kheap.c
mailbox.c
mem_domain.c	userspace: do nothing if added to same domain	2020-10-22 16:47:07 -07:00
mem_slab.c
mempool_sys.c
mempool.c
mmu.c	mmu: Fix mapping_pos calculation	2020-10-23 16:24:04 -04:00
msg_q.c
mutex.c
pipes.c
poll.c
queue.c
sched.c	kernel: add context pointer to thread->fn_abort	2020-10-22 23:32:37 -04:00
sem.c
smp.c
stack.c
system_work_q.c
thread_abort.c
thread.c	kernel: add common bits to support TLS	2020-10-24 10:52:00 -07:00
timeout.c
timer.c
userspace_handler.c
userspace.c
version.c
work_q.c