Charles E. Youse 3bc79fdf2c arch/x86: refactor APIC timer configuration to SoC level ... The APIC is part of the SoC, not the board, so move the defaults down. Signed-off-by: Charles E. Youse <charles.youse@intel.com>		2019-09-21 16:43:26 -07:00
..
arc	arc: hsdk: add lvgl support for hsdk board	2019-09-17 20:40:38 +08:00
arm	boards: mec1501modular_assy6885: Reduce image file size	2019-09-21 13:35:14 -07:00
common
nios2
posix	boards: native_posix: Disable default testing on native_posix_64	2019-09-17 20:44:14 +08:00
riscv	boards: litex_vexriscv: Enable LiteX DNA driver	2019-09-21 21:36:00 +02:00
shields	shields: ssd1306_128x64: fix documentation	2019-09-17 06:49:37 -05:00
x86	arch/x86: refactor APIC timer configuration to SoC level	2019-09-21 16:43:26 -07:00
x86_64/qemu_x86_64
xtensa
CMakeLists.txt
index.rst
Kconfig