mirror of
https://github.com/zephyrproject-rtos/zephyr
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38e17b68e3
The x86 paging code has been rewritten to support another paging mode and non-identity virtual mappings. - Paging code now uses an array of paging level characteristics and walks tables using for loops. This is opposed to having different functions for every paging level and lots of #ifdefs. The code is now more concise and adding new paging modes should be trivial. - We now support 32-bit, PAE, and IA-32e page tables. - The page tables created by gen_mmu.py are now installed at early boot. There are no longer separate "flat" page tables. These tables are mutable at any time. - The x86_mmu code now has a private header. Many definitions that did not need to be in public scope have been moved out of mmustructs.h and either placed in the C file or in the private header. - Improvements to dumping page table information, with the physical mapping and flags all shown - arch_mem_map() implemented - x86 userspace/memory domain code ported to use the new infrastructure. - add logic for physical -> virtual instruction pointer transition, including cleaning up identity mappings after this takes place. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
40 lines
1.1 KiB
Plaintext
40 lines
1.1 KiB
Plaintext
/*
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* Copyright (c) 2020 Intel Corp.
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Pagetables. These are produced by arch/x86/gen-mmu.py based on
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* data in zephyr_prebuilt.elf (the result of linker pass 1).
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* For the pass 1 build, an equal-sized dummy area is provided as
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* to not shift memory addresses that occur after this.
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*/
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#ifdef CONFIG_MMU
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SECTION_DATA_PROLOGUE(pagetables,,)
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{
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. = ALIGN(4096);
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z_x86_pagetables_start = .;
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#ifdef LINKER_PASS2
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KEEP(*(pagetables)) /* gen_mmu.py */
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#else
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KEEP(*(.dummy_pagetables)) /* from x86_mmu.c, just an empty array */
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#endif /* LINKER_PASS2 */
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/* Top-level paging structure is the last thing in this section */
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#if CONFIG_X86_PAE
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/* 4-entry PDPT */
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z_x86_kernel_ptables = . - 32;
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#else
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/* Page directory or PML4 */
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z_x86_kernel_ptables = . - 4096;
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#endif /* CONFIG_X86_PAE */
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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#ifdef LINKER_PASS2
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/DISCARD/ :
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{
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/* We have the real ones in this build */
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*(.dummy_pagetables)
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}
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#endif /* LINKER_PASS2 */
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#endif /* CONFIG_MMU */
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