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36ba3d4abd
Add basic port for QuickLogic EOS S3 SoC. Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
32 lines
416 B
Plaintext
32 lines
416 B
Plaintext
# Copyright (c) 2020 Antmicro <www.antmicro.com>
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# SPDX-License-Identifier: Apache-2.0
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if SOC_EOS_S3
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config SOC
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default "quicklogic_eos_s3"
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config NUM_IRQS
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default 52
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 61440000
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if SERIAL
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config UART_PL011
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default y
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config UART_INTERRUPT_DRIVEN
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default y
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config UART_PL011_PORT0
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default y
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config UART_PL011_PORT1
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default n
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endif # SERIAL
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endif # SOC_EOS_S3
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