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zephyr/dts/xtensa
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Andy Ross a8d5437799 soc/xtensa: Misc. checkpatch fixups 
Code style fixes.  Kept separate from the original changes to permit
easier rebasing.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-21 06:38:53 -04:00
..
espressif
intel soc/xtensa: Misc. checkpatch fixups 2020-10-21 06:38:53 -04:00
sample_controller.dtsi
xtensa.dtsi