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In crt0.S the MMU is initialized. It uses the statically build page tables. Here 32-bit paging scheme is used, thereby each page table entry maps to a 4KB page. The valid regions of the memory are specified by SOC specific file(soc.c). JIRA: ZEP-2099 Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com> |
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arc | ||
arm | ||
common | ||
nios2 | ||
riscv32 | ||
x86 | ||
xtensa | ||
Kconfig | ||
Makefile |