Derek Snell 44885cbca5 boards: mimxrt595: add CONFIG_MIPI_DPHY_CLK_SRC ... Give option in soc.c to initialize the MIPI DPHY clock from the default AUX1_PLL, or from the FRO using CONFIG_MIPI_DPHY_CLK_SRC_FRO. Signed-off-by: Derek Snell <derek.snell@nxp.com>		2024-01-05 09:02:25 +01:00
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arc
arm	boards: mimxrt595: add CONFIG_MIPI_DPHY_CLK_SRC	2024-01-05 09:02:25 +01:00
arm64	imx8m: auto generate mmu_regions array from dt compatiable	2023-12-27 16:09:42 +00:00
mips
nios2
posix	soc: posix: fix kconfig description	2023-12-18 10:11:18 +01:00
riscv	drivers: usb: usb_dc_it82xx2: optimize the basic/extend endpoints control	2023-12-20 11:15:38 +01:00
sparc
x86	soc: x86: raptor_lake: soc_gpio : Modified to support RPL-P	2023-12-27 16:06:19 +00:00
xtensa	adsp: hda: accept 16 byte alignment for HDA buffer size	2024-01-03 18:59:55 +00:00
CMakeLists.txt
Kconfig