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zephyr/boards/riscv32
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Anas Nashif c2c6a6a245 qemu_riscv32: use hifive1 configuration 
Use hifive1 configuration for this qemu and set
SYS_CLOCK_HW_CYCLES_PER_SEC to 10000000

Fixes #10043

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-11-05 11:00:38 -05:00
..
hifive1 riscv32: hifive1: make board run in qemu 2018-11-05 11:00:38 -05:00
m2gl025_miv riscv: Move DTS Kconfig enablement to arch level 2018-11-03 06:58:23 -04:00
qemu_riscv32 qemu_riscv32: use hifive1 configuration 2018-11-05 11:00:38 -05:00
zedboard_pulpino riscv: Move DTS Kconfig enablement to arch level 2018-11-03 06:58:23 -04:00
index.rst board: zedboard_pulpino: move docs 2018-02-09 18:03:12 -05:00