Zide Chen 50a08d9e8b loapic timer: LVTT should be programmed before ICR ... Intel SDM Vol3 10.5.4.1 states that "A write to LVT Timer Register that changes the timer mode disarms the local APIC timer". This implies that LVT Timer register needs to be programmed before Initial Count register, otherwise the LOAPIC timer could not be armed. Signed-off-by: Zide Chen <zide.chen@intel.com>		2018-07-24 09:19:33 -04:00
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altera_avalon_timer_hal.c
arcv2_timer0.c
CMakeLists.txt
cortex_m_systick.c
hpet.c	kernel: Deprecate sys_clock_us_per_tick variable.	2018-07-20 00:03:52 -04:00
Kconfig	drivers: timer: Kconfig: Remove redundant 'default n' properties	2018-07-03 17:11:31 -04:00
loapic_timer.c	loapic timer: LVTT should be programmed before ICR	2018-07-24 09:19:33 -04:00
native_posix_timer.c	kernel: Deprecate sys_clock_us_per_tick variable.	2018-07-20 00:03:52 -04:00
nrf_rtc_timer.c	drivers: timer: nrf: Fix expected_sys_ticks issue in case of k_busy_wait	2018-07-15 22:48:34 -04:00
pulpino_timer.c
riscv_machine_timer.c
sys_clock_init.c
xtensa_sys_timer.c	esp32: update to ESP-IDF v3.0-dev-2648-gb2ff235b	2018-06-13 18:53:43 -04:00