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https://github.com/zephyrproject-rtos/zephyr
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cd83e85edc
RISC-V is an open-source instruction set architecture.
Added support for the 32bit version of RISC-V to Zephyr.
1) exceptions/interrupts/faults are handled at the architecture
level via the __irq_wrapper handler. Context saving/restoring
of registers can be handled at both architecture and SOC levels.
If SOC-specific registers need to be saved, SOC level needs to
provide __soc_save_context and __soc_restore_context functions
that shall be accounted by the architecture level, when
corresponding config variable RISCV_SOC_CONTEXT_SAVE is set.
2) As RISC-V architecture does not provide a clear ISA specification
about interrupt handling, each RISC-V SOC handles it in its own
way. Hence, at the architecture level, the __irq_wrapper handler
expects the following functions to be provided by the SOC level:
__soc_is_irq: to check if the exception is the result of an
interrupt or not.
__soc_handle_irq: handle pending IRQ at SOC level (ex: clear
pending IRQ in SOC-specific IRQ register)
3) Thread/task scheduling, as well as IRQ offloading are handled via
the RISC-V system call ("ecall"), which is also handled via the
__irq_wrapper handler. The _Swap asm function just calls "ecall"
to generate an exception.
4) As there is no conventional way of handling CPU power save in
RISC-V, the default nano_cpu_idle and nano_cpu_atomic_idle
functions just unlock interrupts and return to the caller, without
issuing any CPU power saving instruction. Nonetheless, to allow
SOC-level to implement proper CPU power save, nano_cpu_idle and
nano_cpu_atomic_idle functions are defined as __weak
at the architecture level.
Change-Id: I980a161d0009f3f404ad22b226a6229fbb492389
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
119 lines
3.8 KiB
C
119 lines
3.8 KiB
C
/*
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* Copyright (c) 2013-2014, Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief GCC toolchain linker defs
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*
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* This header file defines the necessary macros used by the linker script for
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* use with the GCC linker.
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*/
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#ifndef __LINKER_TOOL_GCC_H
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#define __LINKER_TOOL_GCC_H
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#if defined(CONFIG_ARM)
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OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
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#elif defined(CONFIG_ARC)
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OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")
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#elif defined(CONFIG_X86)
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#if defined(__IAMCU)
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OUTPUT_FORMAT("elf32-iamcu")
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OUTPUT_ARCH(iamcu:intel)
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#else
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OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
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OUTPUT_ARCH(i386)
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#endif
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#elif defined(CONFIG_NIOS2)
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OUTPUT_FORMAT("elf32-littlenios2", "elf32-bignios2", "elf32-littlenios2")
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#elif defined(CONFIG_RISCV32)
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OUTPUT_ARCH(riscv)
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OUTPUT_FORMAT("elf32-littleriscv")
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#else
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#error Arch not supported.
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#endif
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/*
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* The GROUP_START() and GROUP_END() macros are used to define a group
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* of sections located in one memory area, such as RAM, ROM, etc.
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* The <where> parameter is the name of the memory area.
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*/
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#define GROUP_START(where)
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#define GROUP_END(where)
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/*
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* The GROUP_LINK_IN() macro is located at the end of the section
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* description and tells the linker that this section is located in
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* the memory area specified by <where> argument.
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*/
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#define GROUP_LINK_IN(where) > where
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/*
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* As GROUP_LINK_IN(), but takes a second argument indicating the
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* memory region (e.g. "ROM") for the load address. Used for
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* initialized data sections that on XIP platforms must be copied at
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* startup.
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*
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* And, because output directives in GNU ld are "sticky", this must
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* also be used on the first section *after* such an initialized data
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* section, specifying the same memory region (e.g. "RAM") for both
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* vregion and lregion.
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*/
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#ifdef CONFIG_XIP
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#define GROUP_DATA_LINK_IN(vregion, lregion) > vregion AT> lregion
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#else
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#define GROUP_DATA_LINK_IN(vregion, lregion) > vregion
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#endif
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/*
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* The GROUP_FOLLOWS_AT() macro is located at the end of the section
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* and indicates that the section does not specify an address at which
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* it is to be loaded, but that it follows a section which did specify
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* such an address
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*/
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#define GROUP_FOLLOWS_AT(where) AT > where
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/*
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* The SECTION_PROLOGUE() macro is used to define the beginning of a section.
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* The <name> parameter is the name of the section, and the <option> parameter
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* is to include any special options such as (NOLOAD). Page alignment has its
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* own parameter since it needs abstraction across the different toolchains.
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* If not required, the <options> and <align> parameters should be left blank.
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*/
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#define SECTION_PROLOGUE(name, options, align) name options : align
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/*
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* As for SECTION_PROLOGUE(), except that this one must (!) be used
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* for data sections which on XIP platforms will have differeing
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* virtual and load addresses (i.e. they'll be copied into RAM at
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* program startup). Such a section must (!) also use
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* GROUP_LINK_IN_LMA to specify the correct output load address.
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*/
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#ifdef CONFIG_XIP
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#define SECTION_DATA_PROLOGUE(name, options, align) \
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name options : ALIGN_WITH_INPUT align
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#else
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#define SECTION_DATA_PROLOGUE(name, options, align) name options : align
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#endif
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#define SORT_BY_NAME(x) SORT(x)
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#define OPTIONAL
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#define COMMON_SYMBOLS *(COMMON)
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#endif /* !__LINKER_TOOL_GCC_H */
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