mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-11 10:12:56 +00:00
ac74d8b652
Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
105 lines
2.6 KiB
C
105 lines
2.6 KiB
C
/*
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* Copyright (c) 2013-2015, Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief system module for variants with LOAPIC
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*
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*/
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#include <misc/__assert.h>
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#include "board.h"
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#include <kernel.h>
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#include <arch/cpu.h>
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#include <drivers/ioapic.h>
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#include <drivers/loapic.h>
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#include <drivers/sysapic.h>
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#include <irq.h>
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#define IS_IOAPIC_IRQ(irq) (irq < LOAPIC_IRQ_BASE)
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#define HARDWARE_IRQ_LIMIT ((LOAPIC_IRQ_BASE + LOAPIC_IRQ_COUNT) - 1)
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/**
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*
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* @brief Program interrupt controller
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*
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* This routine programs the interrupt controller with the given vector
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* based on the given IRQ parameter.
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*
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* Drivers call this routine instead of IRQ_CONNECT() when interrupts are
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* configured statically.
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*
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* The Galileo board virtualizes IRQs as follows:
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*
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* - The first CONFIG_IOAPIC_NUM_RTES IRQs are provided by the IOAPIC so the
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* IOAPIC is programmed for these IRQs
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* - The remaining IRQs are provided by the LOAPIC and hence the LOAPIC is
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* programmed.
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*
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* @param vector the vector number
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* @param irq the virtualized IRQ
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* @param flags interrupt flags
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*
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*/
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void __irq_controller_irq_config(unsigned int vector, unsigned int irq,
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uint32_t flags)
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{
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__ASSERT(irq >= 0 && irq <= HARDWARE_IRQ_LIMIT, "invalid irq line");
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if (IS_IOAPIC_IRQ(irq)) {
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_ioapic_irq_set(irq, vector, flags);
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} else {
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_loapic_int_vec_set(irq - LOAPIC_IRQ_BASE, vector);
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}
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}
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/**
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*
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* @brief Enable an individual interrupt (IRQ)
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*
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* The public interface for enabling/disabling a specific IRQ for the IA-32
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* architecture is defined as follows in include/arch/x86/arch.h
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*
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* extern void irq_enable (unsigned int irq);
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* extern void irq_disable (unsigned int irq);
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*
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* The irq_enable() routine is provided by the interrupt controller driver due
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* to the IRQ virtualization that is performed by this platform. See the
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* comments in _interrupt_vector_allocate() for more information regarding IRQ
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* virtualization.
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*
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* @return N/A
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*/
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void _arch_irq_enable(unsigned int irq)
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{
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if (IS_IOAPIC_IRQ(irq)) {
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_ioapic_irq_enable(irq);
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} else {
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_loapic_irq_enable(irq - LOAPIC_IRQ_BASE);
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}
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}
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/**
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*
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* @brief Disable an individual interrupt (IRQ)
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*
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* The irq_disable() routine is provided by the interrupt controller driver due
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* to the IRQ virtualization that is performed by this platform. See the
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* comments in _interrupt_vector_allocate() for more information regarding IRQ
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* virtualization.
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*
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* @return N/A
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*/
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void _arch_irq_disable(unsigned int irq)
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{
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if (IS_IOAPIC_IRQ(irq)) {
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_ioapic_irq_disable(irq);
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} else {
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_loapic_irq_disable(irq - LOAPIC_IRQ_BASE);
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}
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}
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