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ac74d8b652
Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
47 lines
1.1 KiB
Plaintext
47 lines
1.1 KiB
Plaintext
# Kconfig - Beetle MCU clock control driver config
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#
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#
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# Copyright (c) 2016 Linaro Limited.
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if SOC_FAMILY_ARM
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menuconfig CLOCK_CONTROL_BEETLE
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bool
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prompt "BEETLE Clock Control"
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depends on SOC_SERIES_BEETLE
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default y if SOC_SERIES_BEETLE
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help
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Enable driver for Reset & Clock Control subsystem found
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in STM32F4 family of MCUs
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config CLOCK_CONTROL_BEETLE_DEVICE_INIT_PRIORITY
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int "Clock Control Device Priority"
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default 1
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depends on CLOCK_CONTROL_BEETLE
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help
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This option controls the priority of clock control
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device initialization. Higher priority ensures that the device
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is initialized earlier in the startup cycle. If unsure, leave
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at default value 1
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config ARM_CLOCK_CONTROL_DEV_NAME
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string "Clock Config Device name"
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default "CLOCK_CONTROL_0"
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depends on CLOCK_CONTROL_BEETLE
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help
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Configure Clock Config Device name
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config CLOCK_CONTROL_BEETLE_ENABLE_PLL
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bool "Enable PLL on Beetle"
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depends on CLOCK_CONTROL && SOC_SERIES_BEETLE
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default n
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help
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Enable PLL on Beetle (default n).
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Select n if not sure.
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endif # SOC_FAMILY_ARM
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