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https://github.com/zephyrproject-rtos/zephyr
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c8687bc2e4
Add support for configuring Ethernet pins using DT pinctrl entries. Note that F1 series pinctrl support is not handled as the driver does not support F1. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
60 lines
1.7 KiB
C
60 lines
1.7 KiB
C
/*
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* Copyright (c) 2017 Erwin Rol <erwin@erwinrol.com>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_ETHERNET_ETH_STM32_HAL_PRIV_H_
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#define ZEPHYR_DRIVERS_ETHERNET_ETH_STM32_HAL_PRIV_H_
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#include <kernel.h>
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#include <zephyr/types.h>
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#define ST_OUI_B0 0x00
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#define ST_OUI_B1 0x80
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#define ST_OUI_B2 0xE1
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#define ETH_STM32_HAL_MTU NET_ETH_MTU
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#define ETH_STM32_HAL_FRAME_SIZE_MAX (ETH_STM32_HAL_MTU + 18)
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/* Definition of the Ethernet driver buffers size and count */
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#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
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#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
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/* Device constant configuration parameters */
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struct eth_stm32_hal_dev_cfg {
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void (*config_func)(void);
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struct stm32_pclken pclken;
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struct stm32_pclken pclken_rx;
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struct stm32_pclken pclken_tx;
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#if !defined(CONFIG_SOC_SERIES_STM32H7X)
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struct stm32_pclken pclken_ptp;
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#endif /* !defined(CONFIG_SOC_SERIES_STM32H7X) */
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const struct soc_gpio_pinctrl *pinctrl;
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size_t pinctrl_len;
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};
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/* Device run time data */
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struct eth_stm32_hal_dev_data {
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struct net_if *iface;
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uint8_t mac_addr[6];
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ETH_HandleTypeDef heth;
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/* clock device */
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const struct device *clock;
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struct k_mutex tx_mutex;
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struct k_sem rx_int_sem;
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#ifdef CONFIG_SOC_SERIES_STM32H7X
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struct k_sem tx_int_sem;
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#endif /* CONFIG_SOC_SERIES_STM32H7X */
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K_KERNEL_STACK_MEMBER(rx_thread_stack,
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CONFIG_ETH_STM32_HAL_RX_THREAD_STACK_SIZE);
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struct k_thread rx_thread;
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bool link_up;
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};
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#define DEV_CFG(dev) \
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((const struct eth_stm32_hal_dev_cfg *)(dev)->config)
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#define DEV_DATA(dev) \
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((struct eth_stm32_hal_dev_data *)(dev)->data)
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#endif /* ZEPHYR_DRIVERS_ETHERNET_ETH_STM32_HAL_PRIV_H_ */
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