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be217e4a3a
In npcx7 series, all of them support the Intel Enhanced Serial Peripheral Interface (eSPI) Revision 1.0. This specification provides a path for migrating host sub-devices via LPC to a lower pin count, higher bandwidth bus. In addition to Host communication via the peripheral channel, it provides virtual wires support, out-of-band communication, and device mastering option over the Chipset SPI flash. Becisdes introducing eSPI device in npcx7, this CL also includes: 1. Add eSPI device tree declarations. 2. Add npcx7-espi-vws-map.dtsi to present the relationship between eSPI Virtual-Wire signals, eSPI registers, and wake-up input sources. 3. Zephyr eSPI api implementation. 4, Add OOB (Out of Band tunneled SMBus) support. 5. Add configuration files for eSPI test suites. Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
23 lines
728 B
YAML
23 lines
728 B
YAML
# Copyright (c) 2020 Nuvoton Technology Corporation.
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# SPDX-License-Identifier: Apache-2.0
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description: Nuvoton NPCX eSPI Virtual Wire (VW) mapping child node
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compatible: "nuvoton,npcx-espi-vw-conf"
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child-binding:
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description: Child node to to present the mapping between VW signal, its core register and input source of MIWU
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properties:
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vw_reg:
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type: array
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required: true
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description: vw signal's register index and vw bitmask.
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wui_map:
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type: phandle
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description: |
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Mapping table between Wake-Up Input (WUI) and vw input signal.
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For example the WUI mapping on NPCX7 for VW_SLP5 would be
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wui_map = <&wui_vw_slp_s5>;
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