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https://github.com/zephyrproject-rtos/zephyr
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b687d76d09
Add infineon xmc series with XMC4500 support. XMC series comes with, - CPU operates upto 120MHz - 3 RAM (PSRAM1 - code, DSRAM1 - data and DSRAM2 - communiation) - upto 1MB flash init: clock control & gpio is not done, so SoC initialization directly relies on HAL. Core operating clock is stored in no_init section, which is kept under DSRAM1. Only DSRAM1 is used until clock support. Using PSRAM1 and DSRAM1 needs adaptation in linker script - planned for next revision. Note: SystemInit cannot be consumed directly due to vector table + HAL linker dependency. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
13 lines
261 B
C
13 lines
261 B
C
/*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Copyright (c) 2020 Linumiz
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* Author: Parthiban Nallathambi <parthiban@linumiz.com>
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*
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*/
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/* Add include for DTS generated information */
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#include <devicetree.h>
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#include <system_XMC4500.h>
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#include <XMC4500.h>
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