zephyr/include/arch
Corey Wharton 58232d58e0 riscv: Add support for floating point
This change adds full shared floating point support for the RISCV
architecture with minimal impact on threads with floating point
support not enabled.

Signed-off-by: Corey Wharton <coreyw7@fb.com>
2020-04-22 16:39:48 -07:00
..
arc kernel: add Z_STACK_PTR_ALIGN ARCH_STACK_PTR_ALIGN 2020-04-21 18:45:45 -04:00
arm kernel: add Z_STACK_PTR_ALIGN ARCH_STACK_PTR_ALIGN 2020-04-21 18:45:45 -04:00
common
nios2 kernel: add Z_STACK_PTR_ALIGN ARCH_STACK_PTR_ALIGN 2020-04-21 18:45:45 -04:00
posix kernel: add Z_STACK_PTR_ALIGN ARCH_STACK_PTR_ALIGN 2020-04-21 18:45:45 -04:00
riscv riscv: Add support for floating point 2020-04-22 16:39:48 -07:00
x86 kernel: add Z_STACK_PTR_ALIGN ARCH_STACK_PTR_ALIGN 2020-04-21 18:45:45 -04:00
xtensa arch: xtensa: replace DT_CPU_CLOCK_FREQUENCY with new dt macros 2020-04-22 11:38:33 -05:00
arch_inlines.h
cpu.h
syscall.h