mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-02 01:54:29 +00:00
506f15c381
We now place the linker directives for the SW ISR table in the common linker scripts, instead of repeating it everywhere. The table will be placed in RAM if dynamic interrupts are enabled. A dedicated section is used, as this data must not move in between build phases. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
282 lines
6.9 KiB
Plaintext
282 lines
6.9 KiB
Plaintext
/*
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* Copyright (c) 2016 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Linker command/script file
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*
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* Linker script for the Nios II platform
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*/
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#define _LINKER
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#define _ASMLANGUAGE
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#include <autoconf.h>
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#include <linker/sections.h>
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#include <linker/linker-defs.h>
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#include <linker/linker-tool.h>
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/* These sections are specific to this CPU */
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#define _EXCEPTION_SECTION_NAME exceptions
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#define _RESET_SECTION_NAME reset
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/* This linker script requires the following macros to be defined in the
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* SOC-specfic linker script. All of these values can be found defined
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* in system.h for CPU configurations that can generate a HAL.
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*
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* _RESET_VECTOR CPU entry point at boot
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* _EXC_VECTOR General exception vector
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* _ROM_ADDR Beginning of flash memory
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* _ROM_SIZE Size in bytes of flash memory
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* _RAM_ADDR Beginning of RAM
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* _RAM_SIZE Size of RAM in bytes
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*
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* For now we support two scenarios:
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*
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* 1. Non-XIP systems where the reset vector is at the beginning of RAM
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* with the exception vector 0x20 bytes after it.
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* 2. XIP systems where the reset vector is at the beginning of ROM and
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* the exception vector is in RAM
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*/
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#ifdef CONFIG_XIP
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#define ROMABLE_REGION FLASH
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#define RAMABLE_REGION SRAM
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#else
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#define ROMABLE_REGION SRAM
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#define RAMABLE_REGION SRAM
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#endif
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#ifdef CONFIG_XIP
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ASSERT(_RESET_VECTOR == _ROM_ADDR, "Reset vector not at beginning of ROM!")
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MEMORY
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{
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RESET (rx) : ORIGIN = _RESET_VECTOR, LENGTH = 0x20
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FLASH (rx) : ORIGIN = _RESET_VECTOR + 0x20 , LENGTH = (_ROM_SIZE - 0x20)
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SRAM (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR)
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/* Used by and documented in include/linker/intlist.ld */
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IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
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}
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#else
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MEMORY
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{
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RESET (wx) : ORIGIN = _RESET_VECTOR, LENGTH = 0x20
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SRAM (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR)
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/* Used by and documented in include/linker/intlist.ld */
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IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
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}
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#endif
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ENTRY(CONFIG_KERNEL_ENTRY)
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SECTIONS
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{
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#include <linker/rel-sections.ld>
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/*
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* .plt and .iplt are here according to
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* 'nios2-zephyr-elf-ld --verbose', before text section.
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*/
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SECTION_PROLOGUE(.plt,,)
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{
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*(.plt)
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}
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SECTION_PROLOGUE(.iplt,,)
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{
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*(.iplt)
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}
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GROUP_START(ROMABLE_REGION)
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_image_rom_start = _ROM_ADDR;
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SECTION_PROLOGUE(_RESET_SECTION_NAME,,)
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{
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KEEP(*(.reset.*))
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} GROUP_LINK_IN(RESET)
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#ifndef CONFIG_XIP
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SECTION_PROLOGUE(_EXCEPTION_SECTION_NAME,,)
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{
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KEEP(*(".exception.entry.*"))
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*(".exception.other.*")
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} GROUP_LINK_IN(ROMABLE_REGION)
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#endif
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SECTION_PROLOGUE(_TEXT_SECTION_NAME,,)
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{
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/* XXX If ALT_CPU_RESET_ADDR is not the same as _ROM_ADDR
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* we are going to waste flash space? */
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. = ALT_CPU_RESET_ADDR;
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_image_text_start = .;
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*(.text)
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*(".text.*")
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*(.gnu.linkonce.t.*)
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KEEP(*(.openocd_dbg))
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KEEP(*(".openocd_dbg.*"))
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} GROUP_LINK_IN(ROMABLE_REGION)
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_image_text_end = .;
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#if defined(CONFIG_GP_ALL_DATA)
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_gp = ABSOLUTE(. + 0x8000);
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PROVIDE(gp = _gp);
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#endif
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#include <linker/common-rom.ld>
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SECTION_PROLOGUE(_RODATA_SECTION_NAME,,)
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{
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*(.rodata)
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*(".rodata.*")
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*(.gnu.linkonce.r.*)
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#ifdef CONFIG_SOC_RODATA_LD
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#include <soc-rodata.ld>
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#endif
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#ifdef CONFIG_CUSTOM_RODATA_LD
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/* Located in project source directory */
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#include <custom-rodata.ld>
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#endif
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} GROUP_LINK_IN(ROMABLE_REGION)
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_image_rom_end = .;
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__data_rom_start = ALIGN(4); /* XIP imaged DATA ROM start addr */
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GROUP_END(ROMABLE_REGION)
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GROUP_START(RAMABLE_REGION)
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#ifdef CONFIG_XIP
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/* Altera strongly recommends keeping exception entry code in RAM
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* even on XIP systems
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*
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* This is code not data, but we need this copied just like XIP data
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*/
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SECTION_DATA_PROLOGUE(_EXCEPTION_SECTION_NAME,,)
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{
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_image_ram_start = .;
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__data_ram_start = .;
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KEEP(*(".exception.entry.*"))
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*(".exception.other.*")
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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#endif
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#ifndef CONFIG_XIP
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_image_ram_start = .;
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#endif
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#include <linker/common-ram.ld>
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SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,)
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{
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*(.data)
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*(".data.*")
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#ifdef CONFIG_SOC_RWDATA_LD
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#include <soc-rwdata.ld>
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#endif
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#ifdef CONFIG_CUSTOM_RWDATA_LD
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/* Located in project source directory */
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#include <custom-rwdata.ld>
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#endif
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/* the Nios2 architecture only has 16-bit signed immediate offsets in
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* the instructions, so accessing a general address requires typically
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* three instructions - basically, two for the two halves of the 32-bit
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* address, and one to merge them - but if we can put the most commonly
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* accessed globals in a special 64K span of memory addressed by the GP
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* register, then we can access those values in a single instruction,
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* saving both codespace and runtime.
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*
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* Since these immediate offsets are signed, place gp 0x8000 past the
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* beginning of .sdata so that we can use both positive and negative
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* offsets.
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*/
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#if defined(CONFIG_GP_LOCAL) || defined(CONFIG_GP_GLOBAL)
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_gp = ABSOLUTE(. + 0x8000);
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PROVIDE(gp = _gp);
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#endif
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*(.sdata .sdata.* .gnu.linkonce.s.*)
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*(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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__data_ram_end = .;
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SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),)
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{
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/*
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* For performance, BSS section is assumed to be 4 byte aligned and
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* a multiple of 4 bytes
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*/
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. = ALIGN(4);
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__bss_start = .;
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*(.sbss)
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*(".sbss.*")
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*(.bss)
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*(".bss.*")
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COMMON_SYMBOLS
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/*
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* As memory is cleared in words only, it is simpler to ensure the BSS
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* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
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*/
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__bss_end = ALIGN(4);
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
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SECTION_PROLOGUE(_NOINIT_SECTION_NAME,(NOLOAD),)
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{
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/*
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* This section is used for non-initialized objects that
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* will not be cleared during the boot process.
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*/
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*(.noinit)
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*(".noinit.*")
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#ifdef CONFIG_SOC_NOINIT_LD
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#include <soc-noinit.ld>
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#endif
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} GROUP_LINK_IN(RAMABLE_REGION)
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/* Define linker symbols */
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_image_ram_end = .;
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_end = .; /* end of image */
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GROUP_END(RAMABLE_REGION)
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#ifdef CONFIG_CUSTOM_SECTIONS_LD
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/* Located in project source directory */
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#include <custom-sections.ld>
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#endif
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#ifdef CONFIG_GEN_ISR_TABLES
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#include <linker/intlist.ld>
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#endif
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#include <linker/debug-sections.ld>
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}
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