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5947014685
ARCv2 cores may access data not aligned by the data size boundary. I.e. read entire 32-bit word from address 0x1. This feature is configurable for ARC EM cores excluding those with secure shield 2+2 mode. When it's available in hardware it's required to enable that feature in run-time as well setting status32.AD bit. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> |
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| v2 | ||
| arch.h | ||
| syscall.h | ||