mirror of
https://github.com/zephyrproject-rtos/zephyr
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644f9ecbf0
Add wdt0 node labels for all watchdogs. Keep the existing wdt node labels in place for backwards compatibility. Add a wdt1 node to the nRF5340 application core .dtsi, but leave it disabled. Leave the wdt node's label set to "WDT" on this core for backwards compatibility also, in case any users are getting it with a string literal instead of asking the devicetree. This can be changed later after this round of watchdog changes has been shaken out and tested more. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
137 lines
4.0 KiB
C
137 lines
4.0 KiB
C
/*
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* Copyright (c) 2019, 2020 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <soc.h>
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#include <devicetree.h>
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/*
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* Account for MDK inconsistencies
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*/
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#if !defined(NRF_I2S0) && defined(NRF_I2S)
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#define NRF_I2S0 NRF_I2S
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#endif
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#if !defined(NRF_P0) && defined(NRF_GPIO)
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#define NRF_P0 NRF_GPIO
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#endif
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#if !defined(NRF_PDM0) && defined(NRF_PDM)
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#define NRF_PDM0 NRF_PDM
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#endif
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#if !defined(NRF_WDT0) && defined(NRF_WDT)
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#define NRF_WDT0 NRF_WDT
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#endif
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/**
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* Check that a devicetree node's "reg" base address matches the
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* correct value from the MDK.
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*
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* This check will only happen if the node is enabled. Disabled or
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* nonexistent nodes are not checked.
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*
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* This allows the same file to work with multiple SoCs and devicetree
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* configurations.
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*
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* @param lbl lowercase-and-underscores devicetree node label to check
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* @param mdk_addr expected address from the Nordic MDK.
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*/
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#define CHECK_DT_REG(lbl, mdk_addr) \
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BUILD_ASSERT( \
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UTIL_OR(UTIL_NOT(DT_HAS_NODE(DT_NODELABEL(lbl))), \
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(DT_REG_ADDR(DT_NODELABEL(lbl)) == \
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(u32_t)(mdk_addr))))
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/**
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* If a node label "lbl" might have different addresses depending on
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* its compatible "compat", you can use this macro to pick the right
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* one.
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*
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* @param lbl lowercase-and-underscores devicetree node label to check
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* @param compat lowercase-and-underscores compatible to check
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* @param addr_if_match MDK address to return if "lbl" has compatible "compat"
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* @param addr_if_no_match MDK address to return otherwise
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*/
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#define NODE_ADDRESS(lbl, compat, addr_if_match, addr_if_no_match) \
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COND_CODE_1(DT_NODE_HAS_COMPAT(DT_NODELABEL(lbl), compat), \
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(addr_if_match), (addr_if_no_match))
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#define CHECK_SPI_REG(lbl, num) \
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CHECK_DT_REG(lbl, \
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NODE_ADDRESS(lbl, nordic_nrf_spi, NRF_SPI##num, \
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NODE_ADDRESS(lbl, nordic_nrf_spim, NRF_SPIM##num, \
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NRF_SPIS##num)))
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#define CHECK_I2C_REG(lbl, num) \
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CHECK_DT_REG(lbl, \
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NODE_ADDRESS(lbl, nordic_nrf_twi, NRF_TWI##num, \
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NODE_ADDRESS(lbl, nordic_nrf_twim, NRF_TWIM##num, \
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NRF_TWIS##num)))
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#define CHECK_UART_REG(lbl, num) \
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CHECK_DT_REG(lbl, \
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NODE_ADDRESS(lbl, nordic_nrf_uart, NRF_UART##num, \
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NRF_UARTE##num))
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CHECK_DT_REG(adc, NODE_ADDRESS(adc, nordic_nrf_adc, NRF_ADC, NRF_SAADC));
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CHECK_DT_REG(clock, NRF_CLOCK);
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CHECK_DT_REG(cryptocell, NRF_CRYPTOCELL);
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CHECK_DT_REG(dppic, NRF_DPPIC);
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CHECK_DT_REG(egu0, NRF_EGU0);
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CHECK_DT_REG(egu1, NRF_EGU1);
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CHECK_DT_REG(egu2, NRF_EGU2);
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CHECK_DT_REG(egu3, NRF_EGU3);
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CHECK_DT_REG(egu4, NRF_EGU4);
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CHECK_DT_REG(egu5, NRF_EGU5);
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CHECK_DT_REG(ficr, NRF_FICR);
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CHECK_DT_REG(flash_controller, NRF_NVMC);
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CHECK_DT_REG(gpio0, NRF_P0);
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CHECK_DT_REG(gpio1, NRF_P1);
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CHECK_DT_REG(gpiote, NRF_GPIOTE);
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CHECK_DT_REG(i2s0, NRF_I2S0);
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CHECK_DT_REG(ipc, NRF_IPC);
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CHECK_DT_REG(kmu, NRF_KMU);
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CHECK_DT_REG(pdm0, NRF_PDM0);
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CHECK_DT_REG(power, NRF_POWER);
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CHECK_DT_REG(pwm0, NRF_PWM0);
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CHECK_DT_REG(pwm1, NRF_PWM1);
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CHECK_DT_REG(pwm2, NRF_PWM2);
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CHECK_DT_REG(pwm3, NRF_PWM3);
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CHECK_DT_REG(qdec, NRF_QDEC);
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CHECK_DT_REG(regulators, NRF_REGULATORS);
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CHECK_DT_REG(rng, NRF_RNG);
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CHECK_DT_REG(rtc0, NRF_RTC0);
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CHECK_DT_REG(rtc1, NRF_RTC1);
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CHECK_DT_REG(rtc2, NRF_RTC2);
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CHECK_SPI_REG(spi0, 0);
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CHECK_SPI_REG(spi1, 1);
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CHECK_SPI_REG(spi2, 2);
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CHECK_DT_REG(spi3, NRF_SPIM3);
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CHECK_DT_REG(spi4, NRF_SPIM4);
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CHECK_DT_REG(spu, NRF_SPU);
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CHECK_DT_REG(temp, NRF_TEMP);
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CHECK_DT_REG(timer0, NRF_TIMER0);
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CHECK_DT_REG(timer1, NRF_TIMER1);
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CHECK_DT_REG(timer2, NRF_TIMER2);
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CHECK_DT_REG(timer3, NRF_TIMER3);
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CHECK_DT_REG(timer4, NRF_TIMER4);
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CHECK_I2C_REG(i2c0, 0);
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CHECK_I2C_REG(i2c1, 1);
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CHECK_DT_REG(i2c2, NRF_TWIM2);
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CHECK_DT_REG(i2c3, NRF_TWIM3);
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CHECK_UART_REG(uart0, 0);
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CHECK_DT_REG(uart1, NRF_UARTE1);
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CHECK_DT_REG(uart2, NRF_UARTE2);
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CHECK_DT_REG(uart3, NRF_UARTE3);
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CHECK_DT_REG(uicr, NRF_UICR);
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CHECK_DT_REG(usbd, NRF_USBD);
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CHECK_DT_REG(vmc, NRF_VMC);
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CHECK_DT_REG(wdt, NRF_WDT0); /* this should be the same node as wdt0 */
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CHECK_DT_REG(wdt0, NRF_WDT0);
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CHECK_DT_REG(wdt1, NRF_WDT1);
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