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a1e806bf44
intList has been populated with the number of isrs, aka interrupts, but nothing has not been using this information so we drop it and everything used to construct it. Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
55 lines
1.7 KiB
C
55 lines
1.7 KiB
C
/*
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* Copyright (c) 2017 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <toolchain.h>
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#include <linker/sections.h>
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#include <sw_isr_table.h>
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#include <arch/cpu.h>
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/* There is an additional member at the end populated by the linker script
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* which indicates the number of interrupts specified
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*/
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struct int_list_header {
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u32_t table_size;
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u32_t offset;
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};
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/* These values are not included in the resulting binary, but instead form the
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* header of the initList section, which is used by gen_isr_tables.py to create
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* the vector and sw isr tables,
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*/
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_GENERIC_SECTION(.irq_info) struct int_list_header _iheader = {
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.table_size = IRQ_TABLE_SIZE,
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.offset = CONFIG_GEN_IRQ_START_VECTOR,
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};
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/* These are placeholder tables. They will be replaced by the real tables
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* generated by gen_isr_tables.py.
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*
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* _irq_spurious and _isr_wrapper are used as placeholder values to
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* ensure that they are not optimized out in the first link. The first
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* link must contain the same symbols as the second one for the code
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* generation to work.
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*/
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/* Some arches don't use a vector table, they have a common exception entry
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* point for all interrupts. Don't generate a table in this case.
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*/
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#ifdef CONFIG_GEN_IRQ_VECTOR_TABLE
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u32_t __irq_vector_table _irq_vector_table[IRQ_TABLE_SIZE] = {
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[0 ...(IRQ_TABLE_SIZE - 1)] = (u32_t)&_isr_wrapper,
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};
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#endif
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/* If there are no interrupts at all, or all interrupts are of the 'direct'
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* type and bypass the _sw_isr_table, then do not generate one.
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*/
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#ifdef CONFIG_GEN_SW_ISR_TABLE
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struct _isr_table_entry __sw_isr_table _sw_isr_table[IRQ_TABLE_SIZE] = {
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[0 ...(IRQ_TABLE_SIZE - 1)] = {(void *)0x42, (void *)&_irq_spurious},
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};
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#endif
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