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65e4178071
zephyr/dts/riscv
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Mateusz Holenko 65e4178071 boards: litex_vexriscv: dts: Reorder liteeth registers 
This is just a cosmetic change to avoid a warning:
"unit-address and first reg (0xb0000000)
don't match for ethernet@e0009800"

Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-12-18 10:35:15 +02:00
..
microsemi-miv.dtsi
riscv32-fe310.dtsi riscv: add a qemu_riscv64 board 2019-08-09 09:11:45 -05:00
riscv32-litex-vexriscv.dtsi boards: litex_vexriscv: dts: Reorder liteeth registers 2019-12-18 10:35:15 +02:00
rv32m1_ri5cy.dtsi dts: riscv: add Generic FSK node 2019-11-08 15:38:57 +01:00
rv32m1_zero_riscy.dtsi dts: riscv: add Generic FSK node 2019-11-08 15:38:57 +01:00
rv32m1.dtsi dts: riscv: add Generic FSK node 2019-11-08 15:38:57 +01:00