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Add the necessary clock configuration to support STM32L-based SoCs. This change likely adds support for other STM32 SoCs as well since the HSI48 clock is configured for all SoCs that support it (except the STM32L4x) instead of just the STM32G4X. Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
92 lines
1.7 KiB
C
92 lines
1.7 KiB
C
/*
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* Copyright (c) 2018 Endre Karlson <endre.karlson@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file SoC configuration macros for the STM32L0 family processors.
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*
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* Based on reference manual:
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* STM32L0X advanced ARM ® -based 32-bit MCUs
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*
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* Chapter 2.2: Memory organization
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*/
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#ifndef _STM32L0_SOC_H_
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#define _STM32L0_SOC_H_
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#ifndef _ASMLANGUAGE
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#include <stm32l0xx.h>
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/* ARM CMSIS definitions must be included before kernel_includes.h.
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* Therefore, it is essential to include kernel_includes.h after including
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* core SOC-specific headers.
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*/
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#include <kernel_includes.h>
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#include <stm32l0xx_ll_system.h>
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#ifdef CONFIG_EXTI_STM32
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#include <stm32l0xx_ll_exti.h>
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#endif
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#ifdef CONFIG_SERIAL_HAS_DRIVER
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#include <stm32l0xx_ll_usart.h>
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#include <stm32l0xx_ll_lpuart.h>
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#endif
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#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
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#include <stm32l0xx_ll_utils.h>
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#include <stm32l0xx_ll_bus.h>
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#include <stm32l0xx_ll_rcc.h>
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#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
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#ifdef CONFIG_I2C_STM32
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#include <stm32l0xx_ll_i2c.h>
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#endif
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#if defined(CONFIG_COUNTER_RTC_STM32)
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#include <stm32l0xx_ll_rtc.h>
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#include <stm32l0xx_ll_exti.h>
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#include <stm32l0xx_ll_pwr.h>
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#endif
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#ifdef CONFIG_SPI_STM32
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#include <stm32l0xx_ll_spi.h>
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#endif
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#ifdef CONFIG_GPIO_STM32
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#include <stm32l0xx_ll_gpio.h>
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#endif
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#ifdef CONFIG_IWDG_STM32
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#include <stm32l0xx_ll_iwdg.h>
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#endif
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#ifdef CONFIG_WWDG_STM32
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#include <stm32l0xx_ll_wwdg.h>
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#endif
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#ifdef CONFIG_ADC_STM32
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#include <stm32l0xx_ll_adc.h>
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#endif
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#ifdef CONFIG_DAC_STM32
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#include <stm32l0xx_ll_dac.h>
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#endif
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#ifdef CONFIG_DMA_STM32
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#include <stm32l0xx_ll_dma.h>
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#endif
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#ifdef CONFIG_ENTROPY_STM32_RNG
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#include <stm32l0xx_ll_rng.h>
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#endif
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#endif /* !_ASMLANGUAGE */
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#endif /* _STM32L0_SOC_H_ */
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