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Before introducing the code for ARM64 (AArch64) we need to relocate the current ARM code to a new AArch32 sub-directory. For now we can assume that no code is shared between ARM and ARM64. There are no functional changes. The code is moved to the new location and the file paths are fixed to reflect this change. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
48 lines
1.0 KiB
C
48 lines
1.0 KiB
C
/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <arch/cpu.h>
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#include <sys/util.h>
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#include <arch/arm/aarch32/cortex_m/cmsis.h>
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/**
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*
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* @brief Reset the system
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*
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* This routine resets the processor.
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*
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* @return N/A
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*/
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void sys_arch_reboot(int type)
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{
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ARG_UNUSED(type);
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/*
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* QEMU is missing the support for rebooting through the SYSRESETREQ
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* mechanism. Just jump back to __reset() of the image in flash,
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* which address can _always_ be found in the vector table reset slot
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* located at address 0x4.
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*/
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extern void z_do_software_reboot(void);
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extern void z_force_exit_one_nested_irq(void);
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/*
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* force enable interrupts locked via PRIMASK if somehow disabled: the
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* boot code does not enable them
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*/
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__asm__ volatile("cpsie i" :::);
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if ((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0) {
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z_do_software_reboot();
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} else {
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__asm__ volatile(
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"ldr r0, =z_force_exit_one_nested_irq\n\t"
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"bx r0\n\t"
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:::);
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}
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}
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