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https://github.com/zephyrproject-rtos/zephyr
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542a7fa25d
The IRQ handler has had a major changes to manage syscall, reschedule and interrupt from user thread and stack guard. Add userspace support: - Use a global variable to know if the current execution is user or machine. The location of this variable is read only for all user thread and read/write for kernel thread. - Memory shared is supported. - Use dynamic allocation to optimize PMP slot usage. If the area size is a power of 2, only one PMP slot is used, else 2 are used. Add stack guard support: - Use MPRV bit to force PMP rules to machine mode execution. - IRQ stack have a locked stack guard to avoid re-write PMP configuration registers for each interruption and then win some cycle. - The IRQ stack is used as "temporary" stack at the beginning of IRQ handler to save current ESF. That avoid to trigger write fault on thread stack during store ESF which that call IRQ handler to infinity. - A stack guard is also setup for privileged stack of a user thread. Thread: - A PMP setup is specific to each thread. PMP setup are saved in each thread structure to improve reschedule performance. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Reviewed-by: Nicolas Royer <nroyer@baylibre.com>
158 lines
4.2 KiB
C
158 lines
4.2 KiB
C
/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Per-arch thread definition
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*
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* This file contains definitions for
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*
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* struct _thread_arch
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* struct _callee_saved
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*
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* necessary to instantiate instances of struct k_thread.
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_RISCV_THREAD_H_
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#define ZEPHYR_INCLUDE_ARCH_RISCV_THREAD_H_
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#ifndef _ASMLANGUAGE
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#include <zephyr/types.h>
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#if !defined(RV_FP_TYPE) && defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
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#ifdef CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION
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#define RV_FP_TYPE uint64_t
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#else
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#define RV_FP_TYPE uint32_t
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#endif
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#endif
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#ifdef CONFIG_RISCV_PMP
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#ifdef CONFIG_64BIT
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#define RISCV_PMP_CFG_NUM (CONFIG_PMP_SLOT >> 3)
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#else
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#define RISCV_PMP_CFG_NUM (CONFIG_PMP_SLOT >> 2)
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#endif
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#endif
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#ifdef CONFIG_PMP_STACK_GUARD
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/*
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* PMP entries:
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* (1 for interrupt stack guard: None)
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* 4 for stacks guard: None
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* 1 for RAM: RW
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* 1 for other address space: RWX
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*/
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#define PMP_REGION_NUM_FOR_STACK_GUARD 6
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#define PMP_CFG_CSR_NUM_FOR_STACK_GUARD 2
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#endif /* CONFIG_PMP_STACK_GUARD */
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#ifdef CONFIG_PMP_POWER_OF_TWO_ALIGNMENT
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#ifdef CONFIG_USERSPACE
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#ifdef CONFIG_PMP_STACK_GUARD
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/*
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* 1 for interrupt stack guard: None
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* 1 for core state: R
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* 1 for program and read only data: RX
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* 1 for user thread stack: RW
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*/
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#define PMP_REGION_NUM_FOR_U_THREAD 4
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#else /* CONFIG_PMP_STACK_GUARD */
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/*
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* 1 for core state: R
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* 1 for program and read only data: RX
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* 1 for user thread stack: RW
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*/
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#define PMP_REGION_NUM_FOR_U_THREAD 3
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#endif /* CONFIG_PMP_STACK_GUARD */
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#define PMP_MAX_DYNAMIC_REGION (CONFIG_PMP_SLOT - PMP_REGION_NUM_FOR_U_THREAD)
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#endif /* CONFIG_USERSPACE */
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#else /* CONFIG_PMP_POWER_OF_TWO_ALIGNMENT */
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#ifdef CONFIG_USERSPACE
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#ifdef CONFIG_PMP_STACK_GUARD
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/*
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* 1 for interrupt stack guard: None
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* 1 for core state: R
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* 2 for program and read only data: RX
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* 2 for user thread stack: RW
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*/
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#define PMP_REGION_NUM_FOR_U_THREAD 6
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#else /* CONFIG_PMP_STACK_GUARD */
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/*
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* 1 for core state: R
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* 2 for program and read only data: RX
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* 2 for user thread stack: RW
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*/
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#define PMP_REGION_NUM_FOR_U_THREAD 5
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#endif /* CONFIG_PMP_STACK_GUARD */
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#define PMP_MAX_DYNAMIC_REGION ((CONFIG_PMP_SLOT - \
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PMP_REGION_NUM_FOR_U_THREAD) >> 1)
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#endif /* CONFIG_USERSPACE */
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#endif /* CONFIG_PMP_POWER_OF_TWO_ALIGNMENT */
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/*
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* The following structure defines the list of registers that need to be
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* saved/restored when a cooperative context switch occurs.
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*/
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struct _callee_saved {
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ulong_t sp; /* Stack pointer, (x2 register) */
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ulong_t s0; /* saved register/frame pointer */
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ulong_t s1; /* saved register */
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ulong_t s2; /* saved register */
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ulong_t s3; /* saved register */
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ulong_t s4; /* saved register */
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ulong_t s5; /* saved register */
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ulong_t s6; /* saved register */
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ulong_t s7; /* saved register */
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ulong_t s8; /* saved register */
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ulong_t s9; /* saved register */
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ulong_t s10; /* saved register */
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ulong_t s11; /* saved register */
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#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
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uint32_t fcsr; /* Control and status register */
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RV_FP_TYPE fs0; /* saved floating-point register */
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RV_FP_TYPE fs1; /* saved floating-point register */
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RV_FP_TYPE fs2; /* saved floating-point register */
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RV_FP_TYPE fs3; /* saved floating-point register */
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RV_FP_TYPE fs4; /* saved floating-point register */
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RV_FP_TYPE fs5; /* saved floating-point register */
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RV_FP_TYPE fs6; /* saved floating-point register */
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RV_FP_TYPE fs7; /* saved floating-point register */
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RV_FP_TYPE fs8; /* saved floating-point register */
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RV_FP_TYPE fs9; /* saved floating-point register */
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RV_FP_TYPE fs10; /* saved floating-point register */
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RV_FP_TYPE fs11; /* saved floating-point register */
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#endif
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};
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typedef struct _callee_saved _callee_saved_t;
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struct _thread_arch {
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uint32_t swap_return_value; /* Return value of z_swap() */
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#ifdef CONFIG_PMP_STACK_GUARD
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ulong_t s_pmpcfg[PMP_CFG_CSR_NUM_FOR_STACK_GUARD];
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ulong_t s_pmpaddr[PMP_REGION_NUM_FOR_STACK_GUARD];
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#endif
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#ifdef CONFIG_USERSPACE
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ulong_t priv_stack_start;
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ulong_t user_sp;
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ulong_t unfinished_syscall;
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ulong_t u_pmpcfg[RISCV_PMP_CFG_NUM];
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ulong_t u_pmpaddr[CONFIG_PMP_SLOT];
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#endif
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};
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typedef struct _thread_arch _thread_arch_t;
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_INCLUDE_ARCH_RISCV_THREAD_H_ */
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