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https://github.com/zephyrproject-rtos/zephyr
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3ab5ac81ca
Enable HW stack protection by default on all STM32 when possible. This excludes all series based on M0(FO) and M0+(G0/L0). Also this is made only on boards with enabled MPU (SRAM > 64K). Cf similar change on nRF boards: #28470 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
47 lines
1.0 KiB
Plaintext
47 lines
1.0 KiB
Plaintext
# SPDX-License-Identifier: Apache-2.0
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CONFIG_SOC_SERIES_STM32F7X=y
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CONFIG_SOC_STM32F767XX=y
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# 72MHz system clock (CubeMX Defaults)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
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# Enable MPU
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CONFIG_ARM_MPU=y
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# Enable HW stack protection
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CONFIG_HW_STACK_PROTECTION=y
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# Enable UART
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CONFIG_SERIAL=y
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# Console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# Enable Pinmux
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CONFIG_PINMUX=y
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# Enable GPIO
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CONFIG_GPIO=y
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# Clock Configuration
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CONFIG_CLOCK_CONTROL=y
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# STLINK provides 8MHz clock input
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CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# Use HSE as PLL input
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CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
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# Nucleo-144 boards do not have an external oscillator, so just use
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# the 8MHz clock signal coming from integrated STLink
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CONFIG_CLOCK_STM32_HSE_BYPASS=y
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# Produce 72MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_M_DIVISOR=4
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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=72
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CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
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CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=3
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=2
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CONFIG_CLOCK_STM32_APB2_PRESCALER=1
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