zephyrproject-rtos/zephyr
0
0
Fork 0
mirror of https://github.com/zephyrproject-rtos/zephyr synced 2025-08-21 16:05:54 +00:00
Code Issues Packages Projects Releases Wiki Activity
73df065616
zephyr/tests/subsys
History
Nicolas Pitre 7f74825958 riscv: add a qemu_riscv64 board 
This emulates a RISC-V in 64-bit mode on a SiFive FE310 dev board.
Memory is tight so a few tests had to be disabled due to the extra
memory usage compared to qemu_riscv32.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-09 09:11:45 -05:00
..
can/frame tests: enable native_posix_64 testing 2019-07-16 10:41:11 -07:00
dfu tests: enable native_posix_64 testing 2019-07-16 10:41:11 -07:00
fs tests/subsys/fs/nvs: entry delete test 2019-08-08 11:07:48 +02:00
jwt
logging riscv: add a qemu_riscv64 board 2019-08-09 09:11:45 -05:00
settings tests/subsys/settings/fcb: add check for target compatibility 2019-08-08 08:47:44 -05:00
shell/shell_history
storage/flash_map tests: enable native_posix_64 testing 2019-07-16 10:41:11 -07:00
usb Revert "sys/util.h: helper macro to perform pointer difference" 2019-07-17 03:44:03 -04:00