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riscv defines the machine-mode timer registers that are implemented by the all riscv SOCs that follow the riscv privileged architecture specification. The timer registers implemented in riscv-qemu follow this specification. To account for future riscv SOCs, reimplement the riscv_qemu_driver by the riscv_machine_driver. Change-Id: I645b03c91b4e07d0f2609908decc27ba9b8240d4 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com> |
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altera_avalon_timer.c | ||
arcv2_timer0.c | ||
cortex_m_systick.c | ||
hpet.c | ||
Kconfig | ||
loapic_timer.c | ||
Makefile | ||
nrf_rtc_timer.c | ||
pulpino_timer.c | ||
riscv_machine_timer.c | ||
sys_clock_init.c |