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https://github.com/zephyrproject-rtos/zephyr
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f5728c298d
This commit adds definition of ACE 2.0 Lunar Lake board.board. Signed-off-by: Krzysztof Frydryk <Krzysztofx.Frydryk@intel.com> Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com>
29 lines
450 B
YAML
29 lines
450 B
YAML
# Copyright (c) 2022 Intel Corporation. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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# Common fields for Intel ADSP HDA DMA controllers
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include: dma-controller.yaml
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properties:
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reg:
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required: true
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dma-channels:
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required: true
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"#dma-cells":
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const: 1
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"dma-buf-addr-alignment":
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required: true
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"dma-buf-size-alignment":
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required: true
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"dma-copy-alignment":
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required: true
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dma-cells:
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- channel
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