mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-02 00:21:55 +00:00
cc334c7273
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types. This handles the remaining includes and kernel, plus
touching up various points that we skipped because of include
dependancies. We also convert the PRI printf formatters in the arch
code over to normal formatters.
Jira: ZEP-2051
Change-Id: Iecbb12601a3ee4ea936fd7ddea37788a645b08b0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
76 lines
2.1 KiB
C
76 lines
2.1 KiB
C
/*
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* Copyright (c) 2015 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef MVIC_H
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#define MVIC_H
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#include <arch/cpu.h>
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/* Register defines. A lot of similarities to APIC, but not quite the same */
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#define MVIC_TPR 0xFEE00080 /* Task priority register */
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#define MVIC_PPR 0xFEE000A0 /* Process priority register */
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#define MVIC_EOI 0xFEE000B0 /* End-of-interrupt register */
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#define MVIC_SIVR 0xFEE000F0 /* Spurious interrupt vector register */
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#define MVIC_ISR 0xFEE00110 /* In-service register */
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#define MVIC_IRR 0xFEE00210 /* Interrupt request register */
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#define MVIC_LVTTIMER 0xFEE00320 /* Local vector table timer register */
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#define MVIC_ICR 0xFEE00380 /* Timer initial count register */
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#define MVIC_CCR 0xFEE00390 /* Timer current count register */
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#define MVIC_IOREGSEL 0xFEC00000 /* Register select (index) */
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#define MVIC_IOWIN 0xFEC00010 /* Register windows (data) */
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/* MVIC_LVTTIMER bits */
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#define MVIC_LVTTIMER_MASK BIT(16)
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#define MVIC_LVTTIMER_PERIODIC BIT(17)
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/* MVIC_IOWIN bits */
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#define MVIC_IOWIN_TRIGGER_LEVEL BIT(15)
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#define MVIC_IOWIN_TRIGGER_EDGE 0
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#define MVIC_IOWIN_MASK BIT(16)
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#define MVIC_IOWIN_SUPPORTED_BITS_MASK (MVIC_IOWIN_MASK | \
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MVIC_IOWIN_TRIGGER_LEVEL)
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/* MVIC IOREGSEL register usage defines */
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#define MVIC_LOW_NIBBLE_MASK 0x07
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#define MVIC_HIGH_NIBBLE_MASK 0x18
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#define MVIC_NUM_RTES 32
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#define _IRQ_TRIGGER_EDGE MVIC_IOWIN_TRIGGER_EDGE
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#define _IRQ_TRIGGER_LEVEL MVIC_IOWIN_TRIGGER_LEVEL
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/* MVIC does not support IRQ_POLARITY_HIGH or IRQ_POLARITY_LOW,
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* leave undefined
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*/
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#ifndef _ASMLANGUAGE
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#include <zephyr/types.h>
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/* Implementation of irq_controller.h interface */
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#define __IRQ_CONTROLLER_VECTOR_MAPPING(irq) ((irq) + 32)
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void __irq_controller_irq_config(unsigned int vector, unsigned int irq,
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u32_t flags);
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int __irq_controller_isr_vector_get(void);
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static inline void __irq_controller_eoi(void)
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{
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*(volatile int *)(MVIC_EOI) = 0;
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}
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#else /* _ASMLANGUAGE */
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.macro __irq_controller_eoi_macro
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xorl %eax, %eax /* zeroes eax */
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movl %eax, MVIC_EOI /* tell MVIC the IRQ is handled */
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.endm
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#endif
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#endif /* MVIC_H */
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