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https://github.com/zephyrproject-rtos/zephyr
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a5c67391bb
When BCM4 bit is set to zero, the hardware semaphore clock is never enabled on startup. The hardware semaphores might still randomly work, but very unreliably, and the locking procedure will need several retries despite no competition on the hardware semaphores. This leads to wasted clock cycles on the M4 and sometimes even random kernel panics. This can be solved by always enabling the hardware semaphore clock in the init procedure of the M4, regardless of whether it is used within the initialization or not. On the M7, it is already always enabled. Signed-off-by: Celina Sophie Kalus <hello@celinakalus.de> |
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| .. | ||
| adi/max32 | ||
| altr | ||
| ambiq | ||
| andestech | ||
| arm | ||
| aspeed | ||
| atmel | ||
| brcm | ||
| cdns | ||
| common | ||
| efinix/sapphire | ||
| ene/kb1200 | ||
| espressif | ||
| gaisler | ||
| gd/gd32 | ||
| infineon | ||
| intel | ||
| ite/ec | ||
| litex/litex_vexriscv | ||
| lowrisc/opentitan | ||
| mediatek/mtk_adsp | ||
| microchip | ||
| native/inf_clock | ||
| neorv32 | ||
| nordic | ||
| nuvoton | ||
| nxp | ||
| openisa/rv32m1 | ||
| qemu | ||
| quicklogic/eos_s3 | ||
| raspberrypi | ||
| renesas | ||
| renode/riscv_virtual | ||
| rockchip | ||
| sifive/sifive_freedom | ||
| silabs | ||
| snps | ||
| st/stm32 | ||
| starfive/jh71xx | ||
| telink/tlsr | ||
| ti | ||
| xen | ||
| xlnx | ||
| CMakeLists.txt | ||
| Kconfig | ||
| Kconfig.v1 | ||
| Kconfig.v1.choice | ||
| Kconfig.v2 | ||