zephyr/drivers/interrupt_controller
Carlo Caione 7baf3f74a9 interrupt_controller: gic: Support PPIs
The GIC-400 driver currently only supports SPIs because the (32) offset
for the INTIDs is hard-coded in the driver. At the driver level there is
no really difference between PPIs and SPIs so we can easily extend the
driver to support PPIs as well.

This is useful if we want to add support for the ARM Generic Timers that
use INTIDs in the PPI range.

SPI interrupts are in the range [0-987]. PPI interrupts are in the range
[0-15].

This commit adds interrupt 'type' cell to the GIC device tree binding
and changes the 'irq' cell to use interrupt type-specific index, rather
than a linear IRQ number.

The 'type'+'irq (index)' combo is automatically fixed up into a linear
IRQ number by the scripts/dts/gen_defines.py script.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-10 06:59:55 +01:00
..
arcv2_irq_unit.c
cavs_ictl.c
cavs_ictl.h
CMakeLists.txt drivers: interrupt_controller: Add SweRV PIC support 2019-12-09 12:46:56 -05:00
dw_ictl.c
dw_ictl.h
exti_stm32.c
exti_stm32.h
gic-400.c interrupt_controller: gic: Support PPIs 2019-12-10 06:59:55 +01:00
ioapic_intr.c Revert "interrupt_controller: ioapic_intr: revert CPU target change" 2019-12-03 20:34:47 -06:00
ioapic_priv.h
Kconfig drivers: interrupt_controller: Add SweRV PIC support 2019-12-09 12:46:56 -05:00
Kconfig.multilevel
Kconfig.multilevel.aggregator_template
Kconfig.rv32m1 boards: riscv: rv32m1: enable BT related configuration 2019-11-08 15:38:57 +01:00
Kconfig.s1000
Kconfig.sam0
Kconfig.shared_irq
Kconfig.stm32
loapic_intr.c
loapic_spurious.S
plic.c
rv32m1_intmux.c
sam0_eic_priv.h
sam0_eic.c
sam0_eic.h
shared_irq.c interrupt_controller: shared_irq: DT_<COMPAT> is deprecated 2019-12-09 09:49:12 -06:00
swerv_pic.c drivers: interrupt_controller: Add SweRV PIC support 2019-12-09 12:46:56 -05:00
system_apic.c
vexriscv_litex.c