mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-02 13:32:33 +00:00
Usually, we want to operate only on "available" device nodes ("available" means "status is okay and a matching binding is found"), but that's not true in all cases. Sometimes we want to operate on special nodes without matching bindings, such as those describing memory. To handle the distinction, change various additional devicetree APIs making it clear that they operate only on available device nodes, adjusting gen_defines and devicetree.h implementation details accordingly: - emit macros for all existing nodes in gen_defines.py, regardless of status or matching binding - rename DT_NUM_INST to DT_NUM_INST_STATUS_OKAY - rename DT_NODE_HAS_COMPAT to DT_NODE_HAS_COMPAT_STATUS_OKAY - rename DT_INST_FOREACH to DT_INST_FOREACH_STATUS_OKAY - rename DT_ANY_INST_ON_BUS to DT_ANY_INST_ON_BUS_STATUS_OKAY - rewrite DT_HAS_NODE_STATUS_OKAY in terms of a new DT_NODE_HAS_STATUS - resurrect DT_HAS_NODE in the form of DT_NODE_EXISTS - remove DT_COMPAT_ON_BUS as a public API - use the new default_prop_types edtlib parameter Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
175 lines
4.5 KiB
C
175 lines
4.5 KiB
C
/*
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* Copyright (c) 2019, Linaro
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_imx_pwm
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#include <errno.h>
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#include <drivers/pwm.h>
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#include <soc.h>
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#include <fsl_pwm.h>
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#include <fsl_clock.h>
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#define LOG_LEVEL CONFIG_PWM_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(pwm_mcux);
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#define CHANNEL_COUNT 2
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struct pwm_mcux_config {
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PWM_Type *base;
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uint8_t index;
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clock_name_t clock_source;
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pwm_clock_prescale_t prescale;
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pwm_mode_t mode;
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};
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struct pwm_mcux_data {
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uint32_t period_cycles[CHANNEL_COUNT];
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pwm_signal_param_t channel[CHANNEL_COUNT];
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};
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static int mcux_pwm_pin_set(struct device *dev, u32_t pwm,
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u32_t period_cycles, u32_t pulse_cycles,
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pwm_flags_t flags)
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{
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const struct pwm_mcux_config *config = dev->config_info;
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struct pwm_mcux_data *data = dev->driver_data;
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u8_t duty_cycle;
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if (pwm >= CHANNEL_COUNT) {
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LOG_ERR("Invalid channel");
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return -EINVAL;
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}
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if (flags) {
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/* PWM polarity not supported (yet?) */
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return -ENOTSUP;
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}
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if ((period_cycles == 0) || (pulse_cycles > period_cycles)) {
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LOG_ERR("Invalid combination: period_cycles=%u, "
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"pulse_cycles=%u", period_cycles, pulse_cycles);
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return -EINVAL;
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}
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if (period_cycles > UINT16_MAX) {
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/* 16-bit resolution */
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LOG_ERR("Too long period (%u), adjust pwm prescaler!",
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period_cycles);
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/* TODO: dynamically adjust prescaler */
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return -EINVAL;
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}
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duty_cycle = 100 * pulse_cycles / period_cycles;
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/* FIXME: Force re-setup even for duty-cycle update */
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if (period_cycles != data->period_cycles[pwm]) {
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uint32_t clock_freq;
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uint32_t pwm_freq;
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status_t status;
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data->period_cycles[pwm] = period_cycles;
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LOG_DBG("SETUP dutycycle to %u\n", duty_cycle);
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clock_freq = CLOCK_GetFreq(config->clock_source);
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pwm_freq = (clock_freq >> config->prescale) / period_cycles;
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if (pwm_freq == 0) {
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LOG_ERR("Could not set up pwm_freq=%d", pwm_freq);
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return -EINVAL;
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}
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PWM_StopTimer(config->base, 1U << config->index);
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data->channel[pwm].dutyCyclePercent = duty_cycle;
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status = PWM_SetupPwm(config->base, config->index,
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&data->channel[0], CHANNEL_COUNT,
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config->mode, pwm_freq, clock_freq);
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if (status != kStatus_Success) {
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LOG_ERR("Could not set up pwm");
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return -ENOTSUP;
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}
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PWM_SetPwmLdok(config->base, 1U << config->index, true);
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PWM_StartTimer(config->base, 1U << config->index);
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} else {
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PWM_UpdatePwmDutycycle(config->base, config->index,
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(pwm == 0) ? kPWM_PwmA : kPWM_PwmB,
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config->mode, duty_cycle);
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PWM_SetPwmLdok(config->base, 1U << config->index, true);
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}
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return 0;
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}
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static int mcux_pwm_get_cycles_per_sec(struct device *dev, u32_t pwm,
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u64_t *cycles)
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{
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const struct pwm_mcux_config *config = dev->config_info;
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*cycles = CLOCK_GetFreq(config->clock_source) >> config->prescale;
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return 0;
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}
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static int pwm_mcux_init(struct device *dev)
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{
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const struct pwm_mcux_config *config = dev->config_info;
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struct pwm_mcux_data *data = dev->driver_data;
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pwm_config_t pwm_config;
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status_t status;
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PWM_GetDefaultConfig(&pwm_config);
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pwm_config.prescale = config->prescale;
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pwm_config.reloadLogic = kPWM_ReloadPwmFullCycle;
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status = PWM_Init(config->base, config->index, &pwm_config);
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if (status != kStatus_Success) {
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LOG_ERR("Unable to init PWM");
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return -EIO;
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}
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/* Disable fault sources */
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((PWM_Type *)config->base)->SM[config->index].DISMAP[0] = 0x0000;
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((PWM_Type *)config->base)->SM[config->index].DISMAP[1] = 0x0000;
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data->channel[0].pwmChannel = kPWM_PwmA;
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data->channel[0].level = kPWM_HighTrue;
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data->channel[1].pwmChannel = kPWM_PwmB;
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data->channel[1].level = kPWM_HighTrue;
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return 0;
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}
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static const struct pwm_driver_api pwm_mcux_driver_api = {
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.pin_set = mcux_pwm_pin_set,
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.get_cycles_per_sec = mcux_pwm_get_cycles_per_sec,
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};
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#define PWM_DEVICE_INIT_MCUX(n) \
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static struct pwm_mcux_data pwm_mcux_data_ ## n; \
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\
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static const struct pwm_mcux_config pwm_mcux_config_ ## n = { \
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.base = (void *)DT_REG_ADDR(DT_PARENT(DT_DRV_INST(n))), \
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.index = DT_INST_PROP(n, index), \
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.mode = kPWM_EdgeAligned, \
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.prescale = kPWM_Prescale_Divide_128, \
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.clock_source = kCLOCK_IpgClk, \
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}; \
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\
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DEVICE_AND_API_INIT(pwm_mcux_ ## n, \
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DT_INST_LABEL(n), \
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pwm_mcux_init, \
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&pwm_mcux_data_ ## n, \
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&pwm_mcux_config_ ## n, \
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,\
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&pwm_mcux_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(PWM_DEVICE_INIT_MCUX)
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