zephyr/boards/x86/qemu_x86/qemu_x86_lakemont.dts
Daniel Leung 9f9b4a8afa uart: ns16550: use io-mapped DT property for IO port access
The old CONFIG_UART_NS16550_ACCESS_IOPORT has been used to
indicate whether to access the NS16550 UART via IO port
before device tree is used to describe hardware. Now we have
device tree, and we can specify whether a particular UART
needs to be accessed via IO port using property io-mapped.
Therefore, CONFIG_UART_NS16550_ACCESS_IOPORT is no longer
needed (and thus also CONFIG_UART_NS16550_SIMULT_ACCESS).
Remove these two kconfigs and modify code to use device tree
to figure out how to access the UART hardware.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00

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/*
* Copyright (c) 2021 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <mem.h>
#ifndef DT_DRAM_BASE
#define DT_DRAM_BASE 0
#endif
#ifndef DT_DRAM_SIZE
#define DT_DRAM_SIZE DT_SIZE_K(4096)
#endif
#include <intel/lakemont.dtsi>
/ {
model = "QEMU X86 (Lakemont) emulator";
compatible = "qemu,x86_lakemont_emulator";
aliases {
uart-0 = &uart0;
};
chosen {
zephyr,sram = &dram0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
};
dram0: memory@0 {
device_type = "memory";
reg = <DT_DRAM_BASE DT_DRAM_SIZE>;
};
soc {
uart0: uart@3f8 {
compatible = "ns16550";
reg = <0x000003f8 0x100>;
io-mapped;
clock-frequency = <1843200>;
interrupts = <4 IRQ_TYPE_LOWEST_EDGE_RISING 3>;
interrupt-parent = <&intc>;
current-speed = <115200>;
reg-shift = <2>;
status = "okay";
};
hpet: hpet@fed00000 {
compatible = "intel,hpet";
reg = <0xfed00000 0x400>;
interrupts = <2 IRQ_TYPE_FIXED_EDGE_RISING 4>;
interrupt-parent = <&intc>;
status = "okay";
};
};
};