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https://github.com/zephyrproject-rtos/zephyr
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8ce2954e25
Enables the mcux elcdif shim driver and pin muxes on the mimxrt1060_evk board. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
124 lines
4.3 KiB
C
124 lines
4.3 KiB
C
/*
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* Copyright (c) 2018, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <init.h>
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#include <fsl_iomuxc.h>
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#include <fsl_gpio.h>
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static int mimxrt1060_evk_init(struct device *dev)
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{
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ARG_UNUSED(dev);
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
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/* LED */
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09,
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IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(6));
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/* SW0 */
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IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
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#ifdef CONFIG_UART_MCUX_LPUART_1
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/* LPUART1 TX/RX */
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX,
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IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(6));
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX,
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IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(6));
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#endif
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#ifdef CONFIG_UART_MCUX_LPUART_3
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/* LPUART3 TX/RX */
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPUART3_RX, 0);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_06_LPUART3_TX,
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IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(6));
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_07_LPUART3_RX,
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IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(6));
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#endif
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#ifdef CONFIG_DISPLAY_MCUX_ELCDIF
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LCD_CLK, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LCD_ENABLE, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LCD_HSYNC, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_03_LCD_VSYNC, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_04_LCD_DATA00, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_05_LCD_DATA01, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_06_LCD_DATA02, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_07_LCD_DATA03, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_08_LCD_DATA04, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_09_LCD_DATA05, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_10_LCD_DATA06, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_11_LCD_DATA07, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_12_LCD_DATA08, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_13_LCD_DATA09, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_14_LCD_DATA10, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B0_15_LCD_DATA11, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_00_LCD_DATA12, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_01_LCD_DATA13, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_02_LCD_DATA14, 0);
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_03_LCD_DATA15, 0);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_00_LCD_CLK, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_01_LCD_ENABLE, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_02_LCD_HSYNC, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_03_LCD_VSYNC, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_04_LCD_DATA00, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_05_LCD_DATA01, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_06_LCD_DATA02, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_07_LCD_DATA03, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_08_LCD_DATA04, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_09_LCD_DATA05, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_10_LCD_DATA06, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_11_LCD_DATA07, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_12_LCD_DATA08, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_13_LCD_DATA09, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_14_LCD_DATA10, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_15_LCD_DATA11, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_00_LCD_DATA12, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_01_LCD_DATA13, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_02_LCD_DATA14, 0x01B0B0u);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_03_LCD_DATA15, 0x01B0B0u);
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/* LCD Reset */
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_02_GPIO1_IO02, 0);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_02_GPIO1_IO02, 0x10B0u);
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/* LCD Backlight */
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IOMUXC_SetPinMux(IOMUXC_GPIO_B1_15_GPIO2_IO31, 0);
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IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_15_GPIO2_IO31, 0x10B0u);
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gpio_pin_config_t config = {
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kGPIO_DigitalOutput, 0,
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};
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config.outputLogic = 1;
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GPIO_PinInit(GPIO2, 31, &config);
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#endif
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return 0;
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}
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SYS_INIT(mimxrt1060_evk_init, PRE_KERNEL_1, 0);
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