Andrew Boie 846034f678 drivers: loapic_timer: simplify TSC read ... We have an inline function for this in x86's arch.h that works for both 64 and 32-bit. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>		2020-02-06 23:07:37 -05:00
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altera_avalon_timer_hal.c
apic_timer.c
arcv2_timer0.c
arm_arch_timer.c	drivers: timer: Add per-core ARM architected timer	2020-02-01 08:08:43 -05:00
cc13x2_cc26x2_rtc_timer.c
CMakeLists.txt	drivers: timer: Add per-core ARM architected timer	2020-02-01 08:08:43 -05:00
cortex_m_systick.c
hpet.c
Kconfig	drivers: timer: Add per-core ARM architected timer	2020-02-01 08:08:43 -05:00
Kconfig.stm32_lptim
legacy_api.h
litex_timer.c
loapic_timer.c	drivers: loapic_timer: simplify TSC read	2020-02-06 23:07:37 -05:00
mchp_xec_rtos_timer.c
native_posix_timer.c
nrf_rtc_timer.c
riscv_machine_timer.c	riscv_machine_timer: optimize MTIME/MTIMECMP registers access in riscv64	2020-02-04 17:42:48 +02:00
rv32m1_lptmr_timer.c
sam0_rtc_timer.c
stm32_lptim_timer.c
sys_clock_init.c
xlnx_psttc_timer.c
xtensa_sys_timer.c