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https://github.com/zephyrproject-rtos/zephyr
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e282b0ea84
The RTC subsystem in espressif's SOCs, among other tasks is responsible for clock selection for CPU and for low power domain clocks such as RTC_SLOW and RTC_FAST. This commit allows for proper clock source and rate selection for CPU, using the espressif,riscv and espressif,xtensa-lx6/7 bindings. It also enables clock selection for RTC_FAST and RTC_SLOW, that impacts some peripherals, such as rtc_timer. Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
60 lines
1.6 KiB
Plaintext
60 lines
1.6 KiB
Plaintext
# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
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# SPDX-License-Identifier: Apache-2.0
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if SOC_FAMILY_ESPRESSIF_ESP32
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rsource "*/Kconfig"
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menu "MAC Config"
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config ESP_MAC_ADDR_UNIVERSE_WIFI_STA
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bool
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config ESP_MAC_ADDR_UNIVERSE_WIFI_AP
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bool
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config ESP_MAC_ADDR_UNIVERSE_ETH
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bool
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config ESP_MAC_ADDR_UNIVERSE_BT
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bool
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config ESP_MAC_UNIVERSAL_MAC_ADDRESSES_ONE
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bool
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config ESP_MAC_UNIVERSAL_MAC_ADDRESSES_TWO
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bool
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config ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR
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bool
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# Insert chip-specific MAC config
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rsource "*/Kconfig.mac"
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endmenu
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menu "RTC Clock Config"
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config RTC_CLK_CAL_CYCLES
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int "Number of cycles for RTC_SLOW_CLK calibration"
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default 3000
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range 0 32766
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help
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When the startup code initializes RTC_SLOW_CLK, it can perform
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calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
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frequency. This option sets the number of RTC_SLOW_CLK cycles measured
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by the calibration routine. Higher numbers increase calibration
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precision, which may be important for applications which spend a lot of
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time in deep sleep. Lower numbers reduce startup time.
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When this option is set to 0, clock calibration will not be performed at
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startup, and approximate clock frequencies will be assumed:
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- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
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- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
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In case more value will help improve the definition of the launch of the crystal.
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If the crystal could not start, it will be switched to internal RC.
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endmenu
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endif # SOC_FAMILY_ESPRESSIF_ESP32
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