zephyr/arch
Daniel Leung 0d7bdbc876 xtensa: use highest available EPC/EPS regs in restore context
There may be Xtensa SoCs which don't have high enough interrupt
levels for EPC6/EPS6 to exist in _restore_context. So changes
these to those which should be available according to the ISA
config file.

Fixes #30126

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-05 10:31:45 -08:00
..
arc
arm
common
nios2
posix
riscv
sparc
x86
xtensa
CMakeLists.txt
Kconfig