mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-07 10:13:07 +00:00
0db750f266
Updating local variable's name to follow a consistent naming convention.
Change accomplished with the following script:
#!/bin/bash
echo "Searching for ${1} to replace with ${2}"
find ./ \( -name "*.[chs]" -o -name "sysgen.py" -o -name "*.kconf" -o -name "*.arch" \) \
! -path "./host/src/genIdt/*" \
! -path "*/outdir/*" | xargs sed -i 's/\b'${1}'\b/'${2}'/g';
Change-Id: Ie65865c480be5b6a678ef4716dade3ee745bd88f
Signed-off-by: Yonattan Louise <yonattan.a.louise.mendoza@intel.com>
88 lines
3.0 KiB
C
88 lines
3.0 KiB
C
/* task_abort.c - ARM Cortex-M _TaskAbort() routine */
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/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Wind River Systems nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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DESCRIPTION
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The ARM Cortex-M architecture provides its own _TaskAbort() to deal with
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different CPU modes (handler vs thread) when a task aborts. When its entry
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point returns or when it aborts itself, the CPU is in thread mode and must
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call the equivalent of task_abort(<self>), but when in handler mode, the
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CPU must queue a packet to K_swapper(), then exit handler mode to queue the
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PendSV exception and cause the immediate context switch to K_swapper.
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*/
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#ifdef CONFIG_MICROKERNEL
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#include <toolchain.h>
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#include <sections.h>
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#include <minik.h>
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#include <nanok.h>
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#include <microkernel.h>
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#include <nanokernel.h>
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#include <misc/__assert.h>
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static struct k_args cmd_packet;
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/*******************************************************************************
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*
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* _TaskAbort - abort the current task
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*
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* Possible reasons for a task aborting:
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*
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* - the task explicitly aborts itself by calling this routine
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* - the task implicitly aborts by returning from its entry point
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* - the task encounters a fatal exception
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*
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* RETURNS: N/A
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*
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* \NOMANUAL
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*/
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void _TaskAbort(void)
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{
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const int taskAbortCode = 1;
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if (_ScbIsInThreadMode()) {
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_task_ioctl(_k_current_task->Ident, taskAbortCode);
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} else {
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cmd_packet.Comm = TSKOP;
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cmd_packet.Args.g1.task = _k_current_task->Ident;
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cmd_packet.Args.g1.opt = taskAbortCode;
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cmd_packet.alloc = false;
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_k_current_task->Args = &cmd_packet;
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nano_isr_stack_push(&_k_command_stack, (uint32_t) &cmd_packet);
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_ScbPendsvSet();
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}
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}
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#endif /* CONFIG_MICROKERNEL */
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