mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-08-08 20:42:41 +00:00
f2fd40e90d
The ARC HS is a family of high performance CPUs from Synopsys
capable of running wide range of applications from heavy DPS
calculation to full-scale OS.
Still as with other ARC cores ARC HS might be tailored to
a particular application.
As opposed to EM cores ARC HS cores always have support of unaligned
data access and by default GCC generates such a data layout with
so we have to always enable unaligned data access in runtime otherwise
on attempt to access such data we'd see "Unaligned memory exception".
Note we had to explicitly mention CONFIG_CPU_ARCEM=y in
all current defconfigs as CPU_ARC{EM|HS} are now parts of a
choice so we cannot simply select ether option in board's Kconfig.
And while at it change "-mmpy-option" of ARC EM to "wlh1"
which is the same as previously used "6" but matches
Programmer's Reference Manual (PRM) and is more human-friendly.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
39 lines
1.0 KiB
CMake
39 lines
1.0 KiB
CMake
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
# Determines what argument to give to -mcpu= based on the
|
|
# KConfig'uration and sets this to GCC_M_CPU
|
|
|
|
if("${ARCH}" STREQUAL "arm")
|
|
if (CONFIG_CPU_CORTEX_M0)
|
|
set(GCC_M_CPU cortex-m0)
|
|
elseif(CONFIG_CPU_CORTEX_M0PLUS)
|
|
set(GCC_M_CPU cortex-m0plus)
|
|
elseif(CONFIG_CPU_CORTEX_M3)
|
|
set(GCC_M_CPU cortex-m3)
|
|
elseif(CONFIG_CPU_CORTEX_M4)
|
|
set(GCC_M_CPU cortex-m4)
|
|
elseif(CONFIG_CPU_CORTEX_M7)
|
|
set(GCC_M_CPU cortex-m7)
|
|
elseif(CONFIG_CPU_CORTEX_M23)
|
|
set(GCC_M_CPU cortex-m23)
|
|
elseif(CONFIG_CPU_CORTEX_M33)
|
|
if (CONFIG_ARMV8_M_DSP)
|
|
set(GCC_M_CPU cortex-m33)
|
|
else()
|
|
set(GCC_M_CPU cortex-m33+nodsp)
|
|
endif()
|
|
else()
|
|
message(FATAL_ERROR "Expected CONFIG_CPU_CORTEX_x to be defined")
|
|
endif()
|
|
elseif("${ARCH}" STREQUAL "arc")
|
|
if(CONFIG_CPU_EM4_FPUS)
|
|
set(GCC_M_CPU em4_fpus)
|
|
elseif(CONFIG_CPU_EM4_DMIPS)
|
|
set(GCC_M_CPU em4_dmips)
|
|
elseif(CONFIG_CPU_EM4_FPUDA)
|
|
set(GCC_M_CPU em4_fpuda)
|
|
elseif(CONFIG_CPU_ARCHS)
|
|
set(GCC_M_CPU hs)
|
|
endif()
|
|
endif()
|