mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-11 00:16:17 +00:00
This fixes the following warning: > unit address and first address in 'reg' (0x2) don't match for > /enet@42890000/mdio/phy@0 Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
202 lines
3.3 KiB
Plaintext
202 lines
3.3 KiB
Plaintext
/*
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* Copyright 2022,2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nxp/nxp_mimx93_a55.dtsi>
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#include "imx93_evk-pinctrl.dtsi"
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/ {
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model = "NXP i.MX93 A55";
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compatible = "fsl,mimx93";
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chosen {
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zephyr,console = &lpuart2;
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zephyr,shell-uart = &lpuart2;
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zephyr,sram = &sram0;
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zephyr,canbus = &flexcan2;
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};
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cpus {
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cpu@0 {
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status = "disabled";
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};
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};
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sram0: memory@d0000000 {
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reg = <0xd0000000 DT_SIZE_M(1)>;
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};
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aliases {
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led0 = &led_r;
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led1 = &led_g;
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sw0 = &btn_1;
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};
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leds {
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compatible = "gpio-leds";
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led_r: led_r {
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label = "LED_R";
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gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
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};
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led_g: led_g {
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label = "LED_G";
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gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
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};
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led_b: led_b {
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label = "LED_B";
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gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
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};
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};
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keys {
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compatible = "gpio-keys";
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btn_1: btn_1{
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label = "BTN1";
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gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
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};
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btn_2: btn_2{
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label = "BTN2";
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gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
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};
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};
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board_exp_sel: board-exp-sel {
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/*
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* Kconfig BOARD_MIMX93_EVK_A55_EXP_SEL_INIT must be
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* enabled to configure it during init.
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*/
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compatible = "imx93evk-exp-sel";
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mux-gpios = <&gpio_exp0 4 GPIO_ACTIVE_HIGH>;
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mux = "A";
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};
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can_phy0: can-phy0 {
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compatible = "nxp,tja1057", "can-transceiver-gpio";
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standby-gpios = <&gpio_exp0 8 GPIO_ACTIVE_HIGH>;
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max-bitrate = <8000000>;
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#phy-cells = <0>;
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status = "okay";
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};
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};
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&enet {
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status = "okay";
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};
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&enet_mac {
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pinctrl-0 = <&pinmux_enet>;
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pinctrl-names = "default";
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phy-handle = <&phy>;
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zephyr,random-mac-address;
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phy-connection-type = "rgmii";
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status = "okay";
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};
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&enet_mdio {
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pinctrl-0 = <&pinmux_mdio>;
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pinctrl-names = "default";
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status = "okay";
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phy: phy@2 {
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compatible = "realtek,rtl8211f";
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reg = <2>;
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status = "okay";
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};
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};
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&lpuart1 {
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status = "disabled";
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current-speed = <115200>;
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/* clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>; */
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pinctrl-0 = <&uart1_default>;
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pinctrl-names = "default";
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};
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&lpuart2 {
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status = "okay";
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current-speed = <115200>;
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/* clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>; */
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pinctrl-0 = <&uart2_default>;
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pinctrl-names = "default";
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};
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&lpi2c1 {
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status = "disabled";
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clock-frequency = <I2C_BITRATE_FAST>;
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pinctrl-0 = <&i2c1_default>;
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pinctrl-names = "default";
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};
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&lpi2c2 {
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status = "okay";
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clock-frequency = <I2C_BITRATE_FAST>;
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pinctrl-0 = <&i2c2_default>;
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pinctrl-names = "default";
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mfd0:adp5585@34 {
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compatible = "adi,adp5585";
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reg = <0x34>;
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status = "okay";
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gpio_exp0: adp5585_gpio {
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compatible = "adi,adp5585-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <13>;
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gpio-reserved-ranges = <5 3>;
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status = "okay";
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/*
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* This device has non-contiguous gpio range:
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* GPIO Pin R0~R4 are gpio0~4
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* GPIO Pin C0~C4 are gpio8~12
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*/
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};
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};
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gpio_exp1: pcal6524@22 {
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compatible = "nxp,pcal6524";
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reg = <0x22>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <24>;
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int-gpios = <&gpio3 27 (GPIO_ACTIVE_LOW|GPIO_PULL_UP)>;
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status = "okay";
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};
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};
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&lpspi3 {
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status = "disabled";
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clock-frequency = <1000000>;
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pinctrl-0 = <&spi3_default>;
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pinctrl-names = "default";
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};
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&gpio1{
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status = "okay";
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};
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&gpio2{
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status = "okay";
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};
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&gpio3{
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status = "okay";
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};
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&gpio4{
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status = "okay";
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};
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&flexcan2 {
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pinctrl-0 = <&flexcan2_default>;
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pinctrl-names = "default";
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phys = <&can_phy0>;
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status = "okay";
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};
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