Gerard Marull-Paretas 92f50c4760 dts: riscv: telink_b91: include PWM dt-bindings by default ... In order to be consistent with other platforms, include the PWM dt-bindings by default. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>		2022-04-24 19:48:49 +02:00
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espressif	esp32/s2/c3: dts: uart: remove peripheral property	2022-04-20 13:27:47 +02:00
gigadevice	dts: riscv: gigadevice: gd32vf103: add spi1	2022-04-22 09:45:07 +02:00
ite	ITE drivers/interrupt_controller: add wuc interface	2022-03-21 16:35:03 -07:00
starfive
andes_v5_ae350.dtsi
it8xxx2-alts-map.dtsi	ITE: drivers/adc: implement ADC channels 13-16	2022-03-04 09:03:04 -06:00
it8xxx2.dtsi	dts: bindings: pwm: ite,it8xxx2-pwm: add PWM period cell	2022-04-24 19:48:43 +02:00
microsemi-miv.dtsi
neorv32.dtsi
riscv32-fe310.dtsi	soc: riscv: sifive-freedom: Get coreclk and peripheral clock from DTS.	2022-04-05 12:00:03 +02:00
riscv32-litex-vexriscv.dtsi
riscv64-fu540.dtsi	soc: riscv: sifive-freedom: Get coreclk and peripheral clock from DTS.	2022-04-05 12:00:03 +02:00
riscv64-fu740.dtsi	soc: riscv: sifive-freedom: Get coreclk and peripheral clock from DTS.	2022-04-05 12:00:03 +02:00
rv32m1_ri5cy.dtsi
rv32m1_zero_riscy.dtsi
rv32m1.dtsi	dts: riscv: rv32m1: include PWM dt-bindings by default	2022-04-22 10:41:30 -05:00
telink_b91.dtsi	dts: riscv: telink_b91: include PWM dt-bindings by default	2022-04-24 19:48:49 +02:00
virt.dtsi