mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-08-12 14:46:00 +00:00
We create a new platform for our chip series it8xxx2. It is a riscv base soc. Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw> |
||
---|---|---|
.. | ||
hifive1 | ||
hifive1_revb | ||
it8xxx2_evb | ||
litex_vexriscv | ||
m2gl025_miv | ||
qemu_riscv32 | ||
qemu_riscv64 | ||
rv32m1_vega | ||
index.rst |