mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-02 04:24:57 +00:00
259b3d0095
Add initial support for the Cortex-M85 Core which is an implementation of the Armv8.1-M mainline architecture. The support is based on the Cortex-M55 support that already exists in Zephyr. Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
119 lines
3.3 KiB
CMake
119 lines
3.3 KiB
CMake
# SPDX-License-Identifier: Apache-2.0
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# Determines what argument to give to -mcpu= based on the
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# KConfig'uration and sets this to GCC_M_CPU
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if("${ARCH}" STREQUAL "arm")
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if (CONFIG_CPU_CORTEX_M0)
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set(GCC_M_CPU cortex-m0)
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elseif(CONFIG_CPU_CORTEX_M0PLUS)
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set(GCC_M_CPU cortex-m0plus)
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elseif(CONFIG_CPU_CORTEX_M1)
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set(GCC_M_CPU cortex-m1)
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elseif(CONFIG_CPU_CORTEX_M3)
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set(GCC_M_CPU cortex-m3)
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elseif(CONFIG_CPU_CORTEX_M4)
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set(GCC_M_CPU cortex-m4)
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elseif(CONFIG_CPU_CORTEX_M7)
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set(GCC_M_CPU cortex-m7)
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elseif(CONFIG_CPU_CORTEX_M23)
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set(GCC_M_CPU cortex-m23)
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elseif(CONFIG_CPU_CORTEX_M33)
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if (CONFIG_ARMV8_M_DSP)
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set(GCC_M_CPU cortex-m33)
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else()
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set(GCC_M_CPU cortex-m33+nodsp)
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endif()
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elseif(CONFIG_CPU_CORTEX_M55)
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if (CONFIG_ARMV8_1_M_MVEF)
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set(GCC_M_CPU cortex-m55)
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elseif(CONFIG_ARMV8_1_M_MVEI)
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set(GCC_M_CPU cortex-m55+nomve.fp)
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elseif(CONFIG_ARMV8_M_DSP)
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set(GCC_M_CPU cortex-m55+nomve)
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else()
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set(GCC_M_CPU cortex-m55+nodsp)
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endif()
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elseif(CONFIG_CPU_CORTEX_M85)
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if (CONFIG_ARMV8_1_M_MVEF)
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set(GCC_M_CPU cortex-m85)
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elseif(CONFIG_ARMV8_1_M_MVEI)
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set(GCC_M_CPU cortex-m85+nomve.fp)
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elseif(CONFIG_ARMV8_M_DSP)
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set(GCC_M_CPU cortex-m85+nomve)
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else()
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set(GCC_M_CPU cortex-m85+nodsp)
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endif()
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elseif(CONFIG_CPU_CORTEX_R4)
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if(CONFIG_FPU AND CONFIG_CPU_HAS_VFP)
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set(GCC_M_CPU cortex-r4f)
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else()
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set(GCC_M_CPU cortex-r4)
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endif()
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elseif(CONFIG_CPU_CORTEX_R5)
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set(GCC_M_CPU cortex-r5)
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if(CONFIG_FPU AND CONFIG_CPU_HAS_VFP)
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if(NOT CONFIG_VFP_FEATURE_DOUBLE_PRECISION)
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set(GCC_M_CPU ${GCC_M_CPU}+nofp.dp)
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endif()
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else()
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set(GCC_M_CPU ${GCC_M_CPU}+nofp)
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endif()
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elseif(CONFIG_CPU_CORTEX_R7)
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set(GCC_M_CPU cortex-r7)
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if(CONFIG_FPU AND CONFIG_CPU_HAS_VFP)
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if(NOT CONFIG_VFP_FEATURE_DOUBLE_PRECISION)
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set(GCC_M_CPU ${GCC_M_CPU}+nofp.dp)
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endif()
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else()
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set(GCC_M_CPU ${GCC_M_CPU}+nofp)
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endif()
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elseif(CONFIG_CPU_CORTEX_R52)
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set(GCC_M_CPU cortex-r52)
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if(CONFIG_FPU AND CONFIG_CPU_HAS_VFP)
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if(NOT CONFIG_VFP_FEATURE_DOUBLE_PRECISION)
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set(GCC_M_CPU ${GCC_M_CPU}+nofp.dp)
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endif()
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endif()
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elseif(CONFIG_CPU_CORTEX_A9)
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set(GCC_M_CPU cortex-a9)
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else()
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message(FATAL_ERROR "Expected CONFIG_CPU_CORTEX_x to be defined")
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endif()
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elseif("${ARCH}" STREQUAL "arm64")
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if(CONFIG_CPU_CORTEX_A53)
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set(GCC_M_CPU cortex-a53)
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elseif(CONFIG_CPU_CORTEX_A55)
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set(GCC_M_CPU cortex-a55)
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elseif(CONFIG_CPU_CORTEX_A76)
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set(GCC_M_CPU cortex-a76)
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elseif(CONFIG_CPU_CORTEX_A76_A55)
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set(GCC_M_CPU cortex-a76)
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set(GCC_M_TUNE cortex-a76.cortex-a55)
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elseif(CONFIG_CPU_CORTEX_A72)
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set(GCC_M_CPU cortex-a72)
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elseif(CONFIG_CPU_CORTEX_R82)
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set(GCC_M_CPU cortex-r82)
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endif()
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elseif("${ARCH}" STREQUAL "arc")
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if(CONFIG_CPU_EM4_FPUS)
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set(GCC_M_CPU em4_fpus)
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elseif(CONFIG_CPU_EM4_DMIPS)
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set(GCC_M_CPU em4_dmips)
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elseif(CONFIG_CPU_EM4_FPUDA)
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set(GCC_M_CPU em4_fpuda)
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elseif(CONFIG_CPU_HS3X)
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set(GCC_M_CPU archs)
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elseif(CONFIG_CPU_HS4X)
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set(GCC_M_CPU hs4x)
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elseif(CONFIG_CPU_HS5X)
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set(GCC_M_CPU hs5x)
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elseif(CONFIG_CPU_HS6X)
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set(GCC_M_CPU hs6x)
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elseif(CONFIG_CPU_EM4)
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set(GCC_M_CPU arcem)
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elseif(CONFIG_CPU_EM6)
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set(GCC_M_CPU arcem)
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endif()
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endif()
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