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x86_64 supports 4 levels of interrupt nesting, with the interrupt stack divided up into sub-stacks for each nesting level. Unfortunately, the initial interrupt stack pointer on the first CPU was not taking into account reserved space for guard areas, causing a stack overflow exception when attempting to use the last interrupt nesting level, as that page had been set up as a stack guard. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com> |
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arc | ||
arm | ||
common | ||
nios2 | ||
posix | ||
riscv | ||
x86 | ||
xtensa | ||
CMakeLists.txt | ||
Kconfig |