zephyr/boards/arm/qemu_cortex_a53
Carlo Caione 99a8155914 arm: AArch64: Add support for nested exception handlers
In the current implementation both SPSR and ELR registers are saved with
the callee-saved registers and restored by the context-switch routine.
To support nested IRQs we have to save those on the stack when entering
and exiting from an ISR.

Since the values are now carried on the stack we can now add those to
the ESF and the initial stack and take care to restore them for new
threads using the new thread wrapper routine.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-03-31 19:24:48 +02:00
..
doc
board.cmake
Kconfig.board
Kconfig.defconfig
qemu_cortex_a53_defconfig
qemu_cortex_a53.dts
qemu_cortex_a53.yaml arm: AArch64: Add support for nested exception handlers 2020-03-31 19:24:48 +02:00