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https://github.com/zephyrproject-rtos/zephyr
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3291735d11
Adds device tree bindings for the Kinetis System Integration Module (SIM), and defines peripheral source clocks (e.g., system clock or bus clock) and clock gates for all Kinetis SoCs. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
15 lines
257 B
C
15 lines
257 B
C
/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __KINETIS_SIM_H
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#define __KINETIS_SIM_H
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#define KINETIS_SIM_CORESYS_CLK 0
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#define KINETIS_SIM_PLATFORM_CLK 1
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#define KINETIS_SIM_BUS_CLK 2
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#endif /* __KINETIS_SIM_H */
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